MSP430F435IPZ datasheet(27/85 Pages) TI

27 / 85 page

MSP430x43x, MSP430x44x

MIXED SIGNAL MICROCONTROLLER

SLAS344A – JANUARY 2002 – REVISED FEBRUARY 2002

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

brownout, supply voltage supervisor

The brownout circuit detects if a supply voltage is applied to or removed from the VCC terminal and resets the

device appropriately.

The supply voltage supervisor (SVS) circuitry detects if the supply voltage drops to a user selectable level and

supports both supply voltage supervision (the device is automatically reset) and supply voltage monitoring

(SVM, the device is not automatically reset). The SVS circuitry is shown in Figure 4. The initial condition for the

SVS is off to conserve current consumption. The user’s software should enable it when desired.

–

Voltage

Reference

of 1.25 V

VCC

VLD

SVSon

PORON

SVSOP SVSFG

Set POR

rw–(0) rw–(0) rw–(0) rw–(0) rw–(0) rr

rw–(0)

SVSCTL

056h

Brownout

NMI

RST/NMI

Set SVSFG

TCK

Tau ~ 50nS

P1.3/TBOUTH/SVSOut

tReset~ 50uS

Reset

SVSCTL Bits

P6.7/A7/SVSin

Open, if

VLD=0 or VLD=15

’L’ if VLD=0

t(Delay2)~ 50uS

t(Delay1)~ 50uS

Figure 4. Block Diagram of Brownout and Supply Voltage Supervision

The VLD bits control the on/off state of the SVS circuitry. The SVS is off if VLD=0, and on if VLD=1. Bit PORON

enables or disables the automatic reset of the MSP430 upon a low-voltage detection. If PORON=1, a

low-voltage detection generates a POR signal and resets the MSP430. Bit SVSOP is used to watch the actual

SVS comparator output. Bit SVSFG is set as long as a low-voltage situation is detected and remains set until

no low voltage is detected and the software resets it. SVSFG latches such events, whereas SVSOP represents

the actual output of the comparator.

If it is desired to only monitor the supply voltage, but not reset the device if it dips below the determined level,

the user simply resets the PORON bit and sets the level normally. This provides the SVM function. The SVM

function is useful for example, when performing A/D conversions and the user wants to know if the supply

voltage dipped below the minimum operating voltage while the conversion took place.

The SVS circuitry uses hysteresis to reduce sensitivity on voltage drops when the VCC is close to the threshold

level. The hystersis for each SVS level is shown in the table below.

The SVS/SVM has some delay as shown below. The Delay1 is used to avoid erroneous SVS/SVM operation

if it is enabled (VLD changes from 0 to > 0). SVSon bit is L for t(Delay2) whenever the value of VLD (register

SVSCTL) is changed. It is L if VLD = 0.

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