MSP430F435IPZ datasheet(12/85 Pages) TI

12 / 85 page

General-Purpose Register

Program Counter

Stack Pointer

Status Register

Constant Generator

General-Purpose Register

PC/R0

SP/R1

SR/CG1/R2

CG2/R3

R14

R15

MSP430x43x, MSP430x44x

MIXED SIGNAL MICROCONTROLLER

SLAS344A – JANUARY 2002 – REVISED FEBRUARY 2002

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

short-form description

processing unit

The processing unit is based on a consistent and orthogonal CPU and instruction set. This design structure

results in a RISC-like architecture, highly transparent to the application development and notable for its ease

of programming. All operations, other than program-flow instructions, are consequently performed as register

operations in conjunction with seven addressing modes for source and four modes for destination operand.

CPU

The CPU has 16 registers that provide reduced

instruction execution time. This reduces the

one cycle of the processor frequency.

Four of the registers are reserved for special use

as program counter, stack pointer, status register,

and constant generator. The remaining registers

are available as general-purpose registers.

Peripherals are connected to the CPU using

a data address and control bus, and can be

easily handled with all memory manipulation

instructions.

instruction set

The instruction set for this register-to-register architecture constitutes a powerful and easy-to-use assembler

language. The instruction set consists of 51 instructions with three formats and seven address modes. Table 1

provides a summary and example of the three types of instruction formats; the address modes are listed in

Table 2.

Table 1. Instruction Word Formats

Dual operands, source-destination

e.g. ADD R4,R5

R4 + R5 –––> R5

Single operands, destination only

e.g. CALL

PC ––>(TOS), R8––> PC

Relative jump, un/conditional

e.g. JNE

Jump-on-equal bit = 0

Each instruction operating on word and byte data is identified by the suffix B.

Examples:

WORD INSTRUCTIONS

BYTE INSTRUCTIONS

MOV

EDE, TONI

MOV.B

EDE,TONI

ADD

#235h, and MEM

ADD.B

#35h, and MEM

PUSH

PUSH.B

SWPB

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