MSP430F435IPZ datasheet(19/85 Pages) TI

19 / 85 page

MSP430x43x, MSP430x44x

MIXED SIGNAL MICROCONTROLLER

SLAS344A – JANUARY 2002 – REVISED FEBRUARY 2002

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

boot ROM containing bootstrap loader (continued)

RST/NMI

TCK

User program starts

VCC

Reset Condition

Program execution begins with the bootstrap vector at 0C00h (boot ROM) if TCK has applied a minimum of two

negative edges at signal/pin TCK, and if TCK is low while RST/NMI goes from low to high.

Bootloader starts

TMS

RST/NMI

TCK

VCC

Reset Condition

NOTES:

4. The default level of TCK is high. An active low has to be applied to enter the bootstrap loader. Other MSP430s which have a pin

function used with a low default level can use an inverted signal.

5. The TMS signal must be high while TCK clocks are applied. This ensures that the JTAG controller function remains in its default

mode.

The bootstrap loader does not start (via the vector in address 0C00h) if:

D There are less than two negative edges at TCK while RST/NMI is low

D TCK is high when RST/NMI goes from low to high

D JTAG has control over the MSP430 resources

D The supply voltage VCC drops and a POR is executed

D RST/NMI pin is configured for NMI function (NMI bit is set)

flash memory

D Flash memory has n segments of main memory and two segments of information memory (A and B) of 128

bytes each. Each segment in main memory is 512 bytes in size.

D Segments 0 to n may be erased in one step, or each segment may be individually erased.

D Segments A and B can be erased individually, or as a group with segments 0–n.

Segments A and B are also called information memory.

D A security fuse burning is irreversible; no further access to JTAG is possible afterwards.

D Internal generation of the programming/erase voltage: no external VPP has to be applied, but VCC increases

the supply current requirements.

D Program and erase timing is controlled by hardware in the flash memory – no software intervention is

needed.

D The control hardware is called the flash-timing generator. The input frequency of the flash-timing generator

should be in the proper range and should be maintained until the write/program or erase operation is

completed.

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