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MSP430F435IPZ Datasheet(PDF) 68 Page - Texas Instruments |
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MSP430F435IPZ Datasheet(HTML) 68 Page - Texas Instruments |
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68 / 85 page ![]() MSP430x43x, MSP430x44x MIXED SIGNAL MICROCONTROLLER SLAS344A – JANUARY 2002 – REVISED FEBRUARY 2002 68 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 JTAG, program memory and fuse PARAMETER TEST CONDITIONS MIN NOM MAX UNIT f JTAG/T t TCK freq enc VCC = 2.2 V DC 5 MH f(TCK) JTAG/Test (see Note 4) TCK frequency VCC = 3 V DC 10 MHz (see Note 4) Pull-up resistors on TMS, TCK, TDI (see Note 1) VCC = 2.2 V/3 V 25 60 90 k Ω V(FB) JTAG/f Fuse-blow voltage, F versions (see Note 3) VCC = 2.2 V/3 V 6 7 V I JTAG/fuse (see Note 2) Supply current on TDI with fuse blown 100 mA I(FB) (see Note 2) Time to blow the fuse 1 ms I(DD-PGM) F-versions only Current from DVCC when programming is active VCC = 2.7 V/3.6 V 3 5 mA I(DD-Erase) F versions only (see Note 4) Current from DVCC when erase is active VCC = 2.7 V/3.6 V 3 5 mA t(t ti ) F versions only Write/erase cycles 104 105 cycles t(retention) F-versions only Data retention TJ = 25°C 100 years NOTES: 1. TMS, TDI, and TCK pull-up resistors are implemented in all F versions. 2. Once the fuse is blown, no further access to the MSP430 JTAG/test feature is possible. The JTAG block is switched to bypass mode. 3. The supply voltage to blow the fuse is applied to the TDI pin. 4. f(TCK) may be restricted to meet the timing requirements of the module selected. Duration of the program/erase cycle is determined by f(FTG) applied to the flash timing controller. It can be calculated as follows: t(word write) = 33 x 1/f(FTG) t(segment write, byte 0) = 30 x 1/f(FTG) t(segment write end sequence) =5 x 1/f(FTG) t(mass erase) = 5296 x 1/f(FTG) t(segment erase) = 4817 x 1/f(FTG) |
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