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STA400A Datasheet(PDF) 101 Page - STMicroelectronics |
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STA400A Datasheet(HTML) 101 Page - STMicroelectronics |
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101 / 117 page ![]() 101/117 STA400A b1-b0: 00= No Error 10= Unused 01= Memory error, 1st test sequence 11= Memory error, 2nd test sequence XmemStErrAdr - External Memory Management Self-Test Error Address TDM external memory error address. Only one error address will be stored. b23-b12: Row Address b11-b9: Memory Bank Number b8-b0: Column Address UdCycDelta_T - MFP Cycle Number Up-Down Delta Sets the number of system clock cycles the MFP cycle number is shortened or extended if tdm_rd_sync is not at the allowed position. This register influences delta_ref_cyc. Cnt_Prio - MFP Cycles Time Interval Setting Sets the time interval in MFP cycles the priority is decremented UdCycles - MFP Cycle Number Adjustment Sets the number of system clock cycles the MFP cycle number is shortened or extended if tdm_rd_sync is not at the allowed position. This directly influences the jitter of the MFP clock. Type: MultiBytes - R Word Length: 24 Byte Name Address (Hex) Bit Map Reset Value (Hex) XmemStErrAdr3 0638 23-9 -- XmemStErrAdr2 0637 15-8 -- XmemStErrAdr1 0636 7-0 -- Type: MultiBytes - R/W Word Length: 11 Byte Name Address (Hex) Bit Map Reset Value (Hex) UdCycDelta2_T 0641 10-8 00 UdCycDelta1_T 0640 7-0 00 Type: SingleByte - R/W Word Length: 8 Byte Name Address (Hex) Bit Map Reset Value (Hex) Cnt_Prio 0642 7-0 80 Type: MultiBytes - R/W Word Length: 11 Byte Name Address (Hex) Bit Map Reset Value (Hex) UdCycles2 0644 10-8 00 UdCycles1 0643 7-0 9C |
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