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STA400A Datasheet(PDF) 15 Page - STMicroelectronics

Part # STA400A
Description  XMRADIO SDARS CHANNEL DECODER
PDF  117 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA400A Datasheet(HTML) 15 Page - STMicroelectronics

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STA400A
High-Side/Low-Side Injenction Control
In a superetherodyne tuner (using two downconversions to produce the second IF signal at the Channel Decod-
er satellite input) is possible that one LO may use an High-Side injection of the carrier and the other LO may
use a Low-Side injection.
In this case a data polarity convertion is required in the Channed Decoder. To accomodate this function two
methods are available: the first method requires a polarity change in the QCHS and CARCHS bits of the
QPSK_CTRL register, with the second method the IFFREQ register of the carrier NCO must be programmed
with the image frequency using the following formula:
FMCLK - Fc = FMCLK x (IFFREQ)/2
28
For example, to set the image frequency of the 7.015 MHz the value FB4EC4EC (Hex) must be loaded in the
IFFREQ register.
Matched/Interpolator Filters
The STA400A provides two matched/interpolator filters. These filters perform the Nyquist filter function
(matched with the one in the transmission side) with a Root Raised Cosine (RRC) shape and a roll-off factor of
15% and the interpolation function to evaluate the optimum sampling instant of the output symbol. The filters,
based on a poliphase structure (12 taps with 32 coefficients/ tap), receive at their inputs the separate I and Q
streams at FMCLK/FSYM samples/symbols and produce the separate I and Q output streams at one sample per
symbol. The frequency responce of one filter is given in fig.8 and fig.9.
AGC2
The AGC2 loop is designed to maintain a fixed signal level at the input of the Soft Decision Slicer. As shown in
fig.6, the AGC2 loop consists of an error detector, a loop filter and a gain multiplier. The modulus of the complex
symbols is compared to a programmable reference level (AGC2REF register) and then scaled by the
AGC2BETA coefficient and integrated. The filtered error drives two multipliers at the output of the Matched filters
to maintain constant the level at the demodulator output.
The AGC2 loop gain is given by:
βAGC2 = 2AGC2BETA. The parameter AGC2BETA can take values from 0 to 6.
When AGC2BETA="111" the loop gain is null and the AGC2 amplifier gain keeps the last value. The AGC loop
may be opened by programming "111" in the AGC2BETA parameter and writing "0x00" in the AGC2INTG reg-
ister.
The reference level set in the AGC2REF register impacts on the carrier and timing loop equations and on the
operation of the Soft Decision Slicer.
Figure 8. RRC Filter Frequency Responce
0
200
400
600
800
1000
1200
1400
1600
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2000
60
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10
0
Frequency (kHz)
3
815 kHz



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