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MT9072AB Datasheet(PDF) 177 Page - Zarlink Semiconductor Inc

Part # MT9072AB
Description  Octal T1/E1/J1 Framer
PDF  275 Pages
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Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

MT9072AB Datasheet(HTML) 177 Page - Zarlink Semiconductor Inc

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MT9072
Data Sheet
177
Zarlink Semiconductor Inc.
Bit
Name
Functional Description
15-12
#
not used.
11
RFL
(0)
Receive Signaling Freeze due to Loss. If one, the receive signaling is frozen if a receive loss
of signal is detected. The freeze is cleared upon clearance of Loss.
10
DBNCE
(0)
Debounce Select. This bit selects the receive CAS debounce period. If one, 14 ms of
debounce is used. There may be as much as 2 ms added to this duration because the state
change of the signaling equipment is not synchronous with the PCM30 signaling multiframe. If
zero, no debounce is used.
9,8
(00)
not used.
7
6
5
4
TMA1
TMA2
TMA3
TMA4
(0000)
Transmit Multiframe Alignment Bits One to Four. These bits are transmitted on the PCM30
link, in the Multiframe Alignment Signal (MFAS) positions (one to four of timeslot 16) of frame
zero of every Channel Associated signaling (CAS) multiframe. These bits are used by the far
end to identify specific frames of a CAS multiframe. TMA1-4 = 0000 for normal operation.
3X1
(1)
Transmit Non-Multiframe Alignment Signal (NMAS) Spare Bit. This bit is transmitted on the
PCM30 link in bit position five of timeslot 16 of frame zero of every signaling multiframe. X1 is
normally set to one.
2Y
(1)
Transmit Remote Multiframe Alarm Signal. This bit is transmitted on the PCM30 link in bit
position six of timeslot 16 of frame zero of every signaling multiframe when control bit AUTY
(register address Y00) is set to one. The Y bit is used to indicate the loss of multiframe
alignment to the remote end of the link. If one, loss of multiframe alignment; if zero, multiframe
alignment acquired.
1
0
X2
X3
(11)
Transmit Non-Multiframe Alignment Signal (NMAS) Spare Bits. These bits are transmitted
on the PCM30 link in bit positions seven and eight respectively, of timeslot 16 of frame zero of
every signaling multiframe. X2 and X3 are normally set to one.
Table 147 - CAS Control and Data Register (R/W Address Y05) (E1)



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