MT9072AB datasheet(180/275 Pages) ZARLINK

180 / 275 page

MT9072

Data Sheet

180

Zarlink Semiconductor Inc.

Bit

Name

Functional Description

not used.

Sa4SS

(00)

Sa4 Source Select. These 2 bits determine the source of the transmit Sa4 bits in timeslot 0 of

NFAS frames.

Select Bits:

Sa4 Source

Transmit National Data Register (YB0)

TxDL pin (received Sa4 bits are sent to the RxDL pin)

DSTi pin (ST-BUS Channel 0, Bit 4 in NFAS frames)

HDLC (Transmit and Receive Sa4 bits)

Note the received Sa4 bits are always available in the RX National Data Bit Buffer (YC0) and

timeslot 0 on the DSTo pin.

Sa5SS

(00)

Sa5 Source Select. These 2 bits determine the source of the transmit Sa5 bits in timeslot 0 of

NFAS frames.

Select Bits: Sa5 Source

Transmit National Data Register (YB1)

TxDL pin (received Sa5 bits are sent to the RxDL pin)

DSTi pin (ST-BUS Channel 0, Bit 3 in NFAS frames)

HDLC (Transmit and Receive Sa5 bits)

Note the received Sa5 bits are always available in the RX National Data Bit Buffer (YC1) and

timeslot 0 on the DSTo pin.

Sa6SS

(00)

Sa6 Source Select. These 2 bits determine the source of the transmit Sa6 bits in timeslot 0 of

NFAS frames.

Select Bits:

Sa6 Source

Transmit National Data Register (YB2)

TxDL pin (received Sa6 bits are sent to the RxDL pin)

DSTi pin (ST-BUS Channel 0, bit 2 in NFAS frames)

HDLC (Transmit and Receive Sa6 bits)

Note the received Sa6 bits are always available in the RX National Data Bit Buffer (YC2) and

timeslot 0 on the DSTo pin.

Sa7SS

(00)

Sa7 Source Select. These 2 bits determine the source of the transmit Sa7 bits in timeslot 0 of

NFAS frames.

Select Bits:

Sa7 Source

Transmit National Data Register (YB3)

TxDL pin (received Sa7 bits are sent to the RxDL pin)

DSTi pin (ST-BUS Channel 0, Bit 1 in NFAS frames)

HDLC (Transmit and Receive Sa7 bits)

Note the received Sa7 bits are always available in the RX National Data Bit Buffer (YC3) and

timeslot 0 on the DSTo pin.

Sa8SS

(00)

Sa8 Source Select. These 2 bits determine the source of the transmit Sa8 bits in timeslot 0 of

NFAS frames.

Select Bits:

Sa8 Source

Transmit National Data Register (YB4)

TxDL pin (received Sa8 bits are sent to the RxDL pin)

DSTi pin (ST-BUS Channel 0, Bit 1 in NFAS frames)

HDLC (Transmit and Receive Sa8 bits)

Note the received Sa8 bits are always available to the RX National Data Bit Buffer (YC4) and

timeslot 0 on the DSto pin.

4-2

not used.

Table 150 - DataLink Control Register (R/W Address Y08) (E1)

MT9072AB Datasheet(PDF) 180 Page - Zarlink Semiconductor Inc

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