MCP47CMB02 datasheet(117/124 Pages) MICROCHIP

117 / 124 page

 2018-2019 Microchip Technology Inc.

DS20006089B-page 117

MCP47CXBXX

C.7

Offset Error (EOS)

The Offset Error (EOS) is the delta voltage of the VOUT

voltage from the ideal output voltage at the specified

code. This code is specified where the output amplifier

is in the linear operating range; for the MCP47CXBXX,

we specify code 100 (decimal). Offset error does not

include gain error, which is illustrated in Figure C-2.

This error is expressed in mV. Offset error can be

negative or positive. The error can be calibrated by

software in application circuits.

FIGURE C-2:

Offset Error (Zero Gain

Error).

C.8

Offset Error Drift (EOSD)

The Offset Error Drift (EOSD) is the variation in offset

error due to a change in ambient temperature. The off-

set error drift is typically expressed in ppm/°C or µV/°C.

C.9

Gain Error (EG)

Gain Error (EG) is a calculation based on the ideal

slope using the voltage boundaries for the linear range

of the output driver (e.g., code 100 and code 4000); see

Figure C-3). The gain error calculation nullifies the

device’s offset error.

The gain error indicates how well the slope of the actual

transfer function matches the slope of the ideal transfer

function. The gain error is usually expressed as a percent

of Full-Scale Range (% of FSR) or in LSb. FSR is the

ideal full-scale voltage of the DAC (see Equation C-5).

FIGURE C-3:

Gain Error and Full-Scale

Error Example.

EQUATION C-5:

GAIN ERROR EXAMPLE

C.10

Gain Error Drift (EGD)

The Gain Error Drift (EGD) is the variation in gain error

due to a change in ambient temperature. The gain error

drift is typically expressed in ppm/°C (of Full-Scale

Range).

Ideal Transfer

Actual

DAC Input Code

Zero-Scale

Error (EZS)

Offset

Function

4032

Error (EOS)

Transfer

Function

Ideal Transfer

Actual

DAC Input Code

Full-Scale

Error (EFS)

Gain Error (EG)

Function

4032

4095

VREF

Transfer

Function

(@ code = 4032)

Ideal Transfer

Function Shifted by

Offset Error

(crosses at start of

defined linear range)

Where:

EG is expressed in % of Full-Scale Range (FSR).

VOUT(@4032) = The measured DAC output

voltage at the specified code

VOUT_Ideal(@4032) = The calculated DAC output

voltage at the specified code

(4032 * VLSb(Ideal))

VOS = Measured offset voltage

VFull-Scale Range = Expected full-scale output

value (such as the VREF

voltage)

VOUT(@4032) VOS

–

VOUT_Ideal(@4032)

–



VFull-Scale Range

---------------------------------------------------------------------------------------------------- * 100

MCP47CMB02 Datasheet(PDF) 117 Page - Microchip Technology

MCP47CMB02 Datasheet(HTML) 117 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL