MCP47CMB02 datasheet(115/124 Pages) MICROCHIP

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DS20006089B-page 115

MCP47CXBXX

APPENDIX C: TERMINOLOGY

C.1

Resolution

The resolution is the number of DAC output states that

divide the Full-Scale Range (FSR). For the 12-bit DAC,

the resolution is 212, meaning the DAC code ranges

from 0 to 4095.

C.2

Least Significant Bit (LSb)

This is the voltage difference between two successive

codes. For a given output voltage range, it is divided by

the resolution of the device (Equation C-1). The range

may be VDD (or VREF) to VSS (ideal); the DAC register

codes across the linear range of the output driver

(Measured 1) or full scale to zero scale (Measured 2).

EQUATION C-1:

LSb VOLTAGE

CALCULATION

C.3

Monotonic Operation

The monotonic operation means that the device’s

Output Voltage (VOUT) increases with every one code

step (LSb) increment (from VSS to the DAC’s reference

voltage (VDD or VREF)).

FIGURE C-1:

VW (VOUT).

Note:

When there are 2N resistors in the resistor

ladder and 2N tap points, the full-scale

DAC register code is the resistor element

(1 LSb) from the source reference voltage

(VDD or VREF).

2N = 4096 (MCP47CVB2X)

= 1024 (MCP47CVB1X)

= 256 (MCP47CVB0X)

Ideal

Measured 1

Measured 2

VLSb IDEAL



VDD

----------- or

VREF

-------------

VLSb Measured



VOUT(@4032) VOUT(@64)

–

4032 64

–



---------------------------------------------------------------

VLSb

VOUT(@FS) VOUT(@ZS)

–

-----------------------------------------------------------

40h

3Fh

3Eh

03h

02h

01h

00h

Voltage (VW ~= VOUT)

VW (@ Tap)

VS0

VS1

VS3

VS63

VS64

VW =

VSn + VZS(@ Tap 0)

n = 0

n = ?

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