DSPIC33EP128GS708 datasheet(179/484 Pages) MICROCHIP

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 2016-2018 Microchip Technology Inc.

DS70005258C-page 179

dsPIC33EPXXXGS70X/80X FAMILY

14.0 INPUT CAPTURE

The input capture module is useful in applications

requiring frequency (period) and pulse measurements.

The dsPIC33EPXXXGS70X/80X devices support four

input capture channels.

Key features of the input capture module include:

• Hardware-Configurable for 32-Bit Operation in All

modes by Cascading Two Adjacent modules

• Synchronous and Trigger modes of Output

Compare Operation, with up to 21 User-Selectable

Trigger/Sync Sources available

• A 4-Level FIFO Buffer for Capturing and Holding

Timer Values for Several Events

• Configurable Interrupt Generation

• Up to Six Clock Sources available for each module,

Driving a Separate Internal 16-Bit Counter

14.1

Input Capture Resources

Many useful resources are provided on the main prod-

uct page of the Microchip website for the devices listed

in this data sheet. This product page contains the latest

updates and additional information.

14.1.1

KEY RESOURCES

• “Input Capture with Dedicated Timer”

(DS70000352) in the “dsPIC33/PIC24 Family

Reference Manual”

• Code Samples

• Application Notes

• Software Libraries

• Webinars

• All Related “dsPIC33/PIC24 Family Reference

Manual” Sections

• Development Tools

FIGURE 14-1:

INPUT CAPTURE x MODULE BLOCK DIAGRAM

Note 1: This

data

sheet

summarizes

the

features of the dsPIC33EPXXXGS70X/

80X family of devices. It is not intended

to be a comprehensive reference

source. To complement the information

in this data sheet, refer to “Input

Capture

with

Dedicated

Timer”

(DS70000352) in the “dsPIC33/PIC24

Family Reference Manual”, which is

available from the Microchip website

(www.microchip.com).

2: Some registers and associated bits

described in this section may not be

available on all devices. Refer to

Section 4.0 “Memory Organization” in

this data sheet for device-specific register

and bit information.

ICxBUF

4-Level FIFO Buffer

ICx Pin

ICM<2:0>

Set ICxIF

Edge Detect Logic

ICI<1:0>

ICOV, ICBNE

Interrupt

Logic

System Bus

Prescaler

Counter

1:1/4/16

and

Clock Synchronizer

Event and

Trigger and

Sync Logic

Clock

Select

ICx Clock

Sources

Trigger and

Sync Sources

ICTSEL<2:0>

ICxTMR

Increment

Reset

Note 1:

The trigger/sync source is enabled by default and is set to Timer3 as a source. This timer must be enabled for

proper ICx module operation or the trigger/sync source must be changed to another source option.

SYNCSEL<4:0>(1)

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