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DSPIC33EP128GS708 Datasheet(PDF) 280 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 280 Page - Microchip Technology |
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280 / 484 page  dsPIC33EPXXXGS70X/80X FAMILY DS70005258C-page 280 2016-2018 Microchip Technology Inc. 22.2 Analog-to-Digital Converter Resources Many useful resources are provided on the main product page of the Microchip website for the devices listed in this data sheet. This product page contains the latest updates and additional information. 22.2.1 KEY RESOURCES • “12-Bit High-Speed, Multiple SARs A/D Converter (ADC)” (DS70005213) in the “dsPIC33/PIC24 Family Reference Manual” • Code Samples • Application Notes • Software Libraries • Webinars • All Related “dsPIC33/PIC24 Family Reference Manual” Sections • Development Tools REGISTER 22-1: ADCON1L: ADC CONTROL REGISTER 1 LOW R/W-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0 ADON(1) —ADSIDL — — — — — bit 15 bit 8 R/W-0 r-0 r-0 r-0 r-0 U-0 U-0 U-0 NRE(2) — — — — — — — bit 7 bit 0 Legend: r = Reserved bit R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 ADON: ADC Enable bit(1) 1 = ADC module is enabled 0 = ADC module is off bit 14 Unimplemented: Read as ‘0’ bit 13 ADSIDL: ADC Stop in Idle Mode bit 1 = Discontinues module operation when device enters Idle mode 0 = Continues module operation in Idle mode bit 12-8 Unimplemented: Read as ‘0’ bit 7 NRE: Noise Reduction Enable bit(2) 1 = Holds conversion process for one TADCORE when another core completes conversion to reduce noise between cores 0 = Noise reduction feature is disabled bit 6-3 Reserved: Maintain as ‘0’ bit 2-0 Unimplemented: Read as ‘0’ Note 1: Set the ADON bit only after the ADC module has been configured. Changing ADC Configuration bits when ADON = 1 will result in unpredictable behavior. 2: If the NRE bit in the ADCON1L register is set, the end of conversion time is adjusted to reduce the noise between ADC cores. Depending on the number of cores converting and the priority of the input, a few additional TADs may be inserted, making the conversion time slightly less deterministic. |
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