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DSPIC33EP128GS708 Datasheet(PDF) 338 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 338 Page - Microchip Technology |
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338 / 484 page ![]() dsPIC33EPXXXGS70X/80X FAMILY DS70005258C-page 338 2016-2018 Microchip Technology Inc. 24.2 Module Description Figure 24-1 shows a functional block diagram of one analog comparator from the high-speed analog comparator module. The analog comparator provides high-speed operation with a typical delay of 15 ns. The negative input of the comparator is always connected to the DACx circuit. The positive input of the compara- tor is connected to an analog multiplexer that selects the desired source pin. The analog comparator input pins are typically shared with pins used by the Analog-to-Digital Converter (ADC) module. Both the comparator and the ADC can use the same pins at the same time. This capability enables a user to measure an input voltage with the ADC and detect voltage transients with the comparator. FIGURE 24-1: HIGH-SPEED ANALOG COMPARATOR x MODULE BLOCK DIAGRAM CMPxA(1) CMPxC(1) DACx(1) CMPPOL 0 1 AVDD CMREFx CMPx(1) INSELx 12 Interrupt CMPxB(1) CMPxD(1) Pulse Stretcher PWM Trigger and DACOUT1 Note 1: x = 1-4 2: EXTREF1 is connected to DAC1/DAC3. EXTREF2 is connected to DAC2/DAC4. 3: Not available on all devices. Status Digital Filter Output Buffer PGA1OUT PGA2OUT ALTINP (remappable I/O) Request EXTREF RANGE EXTREF1(2) EXTREF2(2,3) DACOE DACOUT2(3) DACOE DBCC bit FDEVOPT<6> DAC1/ DAC3 PGA1OUT DAC2/ DAC4 PGA2OUT PGAOEN PGAOEN Output Buffer |
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