DSPIC33EP128GS708 datasheet(339/484 Pages) MICROCHIP

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DS70005258C-page 339

dsPIC33EPXXXGS70X/80X FAMILY

24.3

Module Applications

This module provides a means for the SMPS dsPIC®

DSC devices to monitor voltage and currents in a

power conversion application. The ability to detect

transient conditions and stimulate the dsPIC DSC

processor and/or peripherals, without requiring the

processor and ADC to constantly monitor voltages or

currents, frees the dsPIC DSC to perform other tasks.

The comparator module has a high-speed comparator

and an associated 12-bit DAC that provides a

programmable reference voltage to the inverting input

of the comparator. The polarity of the comparator out-

put is user-programmable. The output of the module

can be used in the following modes:

• Generate an Interrupt

• Trigger an ADC Sample and Convert Process

• Truncate the PWM Signal (current limit)

• Truncate the PWM Period (current minimum)

• Disable the PWM Outputs (Fault latch)

The output of the comparator module may be used in

multiple modes at the same time, such as: 1) generate

an interrupt, 2) have the ADC take a sample and con-

vert it, and 3) truncate the PWM output in response to

a voltage being detected beyond its expected value.

The comparator module can also be used to wake-up the

system from Sleep or Idle mode when the analog input

voltage exceeds the programmed threshold voltage.

24.4

Digital-to-Analog Comparator (DAC)

Each analog comparator has a dedicated 12-bit DAC

that is used to program the comparator threshold voltage

via the CMPxDAC register. The DAC voltage reference

source is selected using the EXTREF and RANGE bits

in the CMPxCON register.

The EXTREF bit selects either the external voltage ref-

erence, EXTREFx, or an internal source as the voltage

reference source. The EXTREFx input enables users to

connect to a voltage reference that better suits their

application. The RANGE bit enables AVDD as the

voltage reference source for the DAC when an internal

voltage reference is selected.

Each DACx has an output enable bit, DACOE, in the

CMPxCON register that enables the DACx reference

voltage to be routed to an external output pin

(DACOUTx). Refer to Figure 24-1 for connecting the

DACx output voltage to the DACOUTx pins.

24.5

Pulse Stretcher and Digital Logic

The analog comparator can respond to very fast tran-

sient signals. After the comparator output is given the

desired polarity, the signal is passed to a pulse

stretching circuit. The pulse stretching circuit has an

asynchronous set function and a delay circuit that

ensures the minimum pulse width is three system clock

cycles wide to allow the attached circuitry to properly

respond to a narrow pulse event.

The pulse stretcher circuit is followed by a digital filter.

The digital filter is enabled via the FLTREN bit in the

CMPxCON register. The digital filter operates with the

clock specified via the FCLKSEL bit in the CMPxCON

or low state, for at least three of the selected clock

cycles, for it to pass through the digital filter.

Note:

EXTREF2 is not available on all devices.

Note 1: Ensure that multiple DACOE bits are not

set in software. The output on the

DACOUTx pin will be indeterminate if

multiple comparators enable the DACx

output.

2: DACOUT2 is not available on all devices.

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