DSPIC33EP128GS708 datasheet(341/484 Pages) MICROCHIP

341 / 484 page

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DS70005258C-page 341

dsPIC33EPXXXGS70X/80X FAMILY

CMPxCON: COMPARATOR x CONTROL REGISTER

R/W-0

U-0

R/W-0

CMPON

—

CMPSIDL

HYSSEL1

HYSSEL0

FLTREN

FCLKSEL

DACOE

bit 15

bit 8

R/W-0

HS/HC-0

R/W-0

INSEL1

INSEL0

EXTREF

HYSPOL

CMPSTAT

ALTINP

CMPPOL

RANGE

bit 7

bit 0

Legend:

HC = Hardware Clearable bit HS = Hardware Settable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

CMPON: Comparator Operating Mode bit

1 = Comparator module is enabled

0 = Comparator module is disabled (reduces power consumption)

bit 14

Unimplemented: Read as ‘0’

bit 13

CMPSIDL: Comparator Stop in Idle Mode bit

1 = Discontinues module operation when device enters Idle mode.

0 = Continues module operation in Idle mode

If a device has multiple comparators, any CMPSIDL bit set to ‘1’ disables all comparators while in Idle mode.

bit 12-11

HYSSEL<1:0>: Comparator Hysteresis Select bits

11 = 45 mV hysteresis

10 = 30 mV hysteresis

01 = 15 mV hysteresis

00 = No hysteresis is selected

bit 10

FLTREN: Digital Filter Enable bit

1 = Digital filter is enabled

0 = Digital filter is disabled

bit 9

FCLKSEL: Digital Filter and Pulse Stretcher Clock Select bit

1 = Digital filter and pulse stretcher operate with the PWM clock

0 = Digital filter and pulse stretcher operate with the system clock

bit 8

DACOE: DACx Output Enable bit

1 = DACx analog voltage is connected to the DACOUTx pin(1)

0 = DACx analog voltage is not connected to the DACOUTx pin

bit 7-6

INSEL<1:0>: Input Source Select for Comparator bits

If ALTINP = 0, Select from Comparator Inputs:

11 = Selects CMPxD input pin

10 = Selects CMPxC input pin

01 = Selects CMPxB input pin

00 = Selects CMPxA input pin

If ALTINP = 1, Select from Alternate Inputs:

11 = Reserved

10 = Reserved

01 = Selects PGA2 output

00 = Selects PGA1 output

Note 1:

DACOUTx can be associated only with a single comparator at any given time. The software must ensure

that multiple comparators do not enable the DACx output by setting their respective DACOE bit.

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