| Electronic Components Datasheet Search |
|
DSPIC33EP128GS708 Datasheet(PDF) 382 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
DSPIC33EP128GS708 Datasheet(HTML) 382 Page - Microchip Technology |
|
382 / 484 page ![]() dsPIC33EPXXXGS70X/80X FAMILY DS70005258C-page 382 2016-2018 Microchip Technology Inc. TABLE 30-6: DC CHARACTERISTICS: OPERATING CURRENT (IDD) DC CHARACTERISTICS Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C TA +85°C for Industrial -40°C TA +125°C for Extended Parameter No. Typ. Max. Units Conditions Operating Current (IDD)(1) DC20d 8 13 mA -40°C 3.3V 10 MIPS DC20a 8 13 mA +25°C DC20b 8 13 mA +85°C DC20c 8 13 mA +125°C DC22d 12 20 mA -40°C 3.3V 20 MIPS DC22a 12 20 mA +25°C DC22b 12 20 mA +85°C DC22c 12 20 mA +125°C DC24d 19 30 mA -40°C 3.3V 40 MIPS DC24a 19 30 mA +25°C DC24b 19 30 mA +85°C DC24c 19 30 mA +125°C DC25d 27 42 mA -40°C 3.3V 60 MIPS DC25a 27 42 mA +25°C DC25b 27 42 mA +85°C DC25c 27 42 mA +125°C DC26d 30 46 mA -40°C 3.3V 70 MIPS DC26a 30 46 mA +25°C DC26b 30 46 mA +85°C DC27d 57 75 mA -40°C 3.3V 70 MIPS (Note 2) DC27a 57 75 mA +25°C DC27b 57 75 mA +85°C Note 1: IDD is primarily a function of the operating voltage and frequency. Other factors, such as I/O pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption. The test conditions for all IDD measurements are as follows: • Oscillator is configured in EC mode with PLL, OSC1 is driven with external square wave from rail-to-rail (EC clock overshoot/undershoot < 250 mV required) • CLKO is configured as an I/O input pin in the Configuration Word • All I/O pins are configured as inputs and pulled to VSS •MCLR = VDD, WDT and FSCM are disabled • CPU, SRAM, program memory and data memory are operational • No peripheral modules are operating or being clocked (all defined PMDx bits are set) • CPU is executing while(1) statement • JTAG is disabled 2: For this specification, the following test conditions apply: • APLL clock is enabled • All 8 PWMs enabled and operating at maximum speed (PTCON2<2:0> = 000), PTPER = 1000h, 50% duty cycle • All other peripherals are disabled (corresponding PMDx bits are set) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |