IIS2DULPX datasheet(76/106 Pages) STMICROELECTRONICS

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10.16

PAGE_RW (17h)

Enable read and write mode of advanced features dedicated page (R/W)

Table 166. PAGE_RW register

EMB_

FUNC_LIR

PAGE_

WRITE

PAGE_

READ

0(1)

1. This bit must be set to 0 for the correct operation of the device.

Table 167. PAGE_RW register description

EMB_FUNC_LIR

Latched interrupt mode for embedded functions. Default value: 0

(0: embedded functions interrupt request not latched;

1: embedded functions interrupt request latched)

PAGE_WRITE

Enable writes to the selected advanced features dedicated page.(1)

Default value: 0

(1: enable; 0: disable)

PAGE_READ

Enable reads from the selected advanced features dedicated page.(1)

Default value: 0

(1: enable; 0: disable)

1. Page selected by PAGE_SEL[3:0] in PAGE_SEL (02h) register.

10.17

EMB_FUNC_FIFO_EN (18h)

Embedded functions FIFO configuration register (R/W)

Table 168. EMB_FUNC_FIFO_EN register

0(1)

FSM_FIFO_EN

MLC_FILTER_

FEATURE_FIFO

_EN

MLC_

FIFO_EN

STEP_COUNTER

_FIFO_EN

1. This bit must be set to 0 for the correct operation of the device.

Table 169. EMB_FUNC_FIFO_EN register description

FSM_FIFO_EN(1)

Enables batching finite state machine results in the FIFO buffer. Default value: 0

(0: disabled; 1: enabled)

MLC_FILTER_FEATURE_FIFO_EN(1)

Enables batching machine learning core filters and features in the FIFO buffer. Default

value: 0

(0: disabled; 1: enabled)

MLC_FIFO_EN(1)

Enables batching machine learning core results in the FIFO buffer. Default value: 0

(0: disabled; 1: enabled)

STEP_COUNTER_FIFO_EN(1)

Enables batching step counter values in the FIFO buffer. Default value: 0

(0: disabled; 1: enabled)

1. When this bit is set to 1, the FIFO must be enabled in continuous mode.

IIS2DULPX

Embedded functions register description

DS14580 - Rev 1

page 76/106

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