IIS2DULPX datasheet(41/106 Pages) STMICROELECTRONICS

41 / 106 page

8.5

CTRL1 (10h)

R/W

Table 27. CTRL1 register

SMART_POWER

_EN

INT1_

ON_RES

SW_

RESET

IF_ADD_

INC

DRDY_

PULSED

WU_X_EN

WU_Y_EN

WU_Z_EN

Table 28. CTRL1 register description

SMART_POWER_EN

Enables smart power management when the embedded functions are enabled. Default value: 0

(0: disabled; 1: enabled)

INT1_ON_RES(1)

Enables routing the interrupt signals configured on the INT1 pin to the RES/EXT_CLK pin. This bit is

useful when the analog hub / Qvar feature is enabled and the INT1 and INT2 pins are used to connect

the external analog lines or the electrodes to sense the Qvar signal. Default value: 0

(0: disabled; 1: enabled)

SW_RESET

Software reset resets all CTRL registers to their default values. Default value: 0

(0: disabled; 1: enabled)

This bit is automatically reset to 0 at the end of the procedure.

IF_ADD_INC

The register address is automatically incremented during a multiple-byte access with a serial interface.

(0: disabled;

1: enabled (default))

DRDY_PULSED

Enables pulsed data-ready mode

(0: data-ready latched mode (returns to 0 only after reading over an interface) (default);

1: data-ready pulsed mode (the data-ready pulses are typ. 90 µs long))

WU_X_EN

Enables wake-up event detection status on the X-axis. Default value: 0

(0: disabled; 1: enabled)

WU_Y_EN

Enables wake-up event detection status on the Y-axis. Default value: 0

(0: disabled; 1: enabled)

WU_Z_EN

Enables wake-up event detection status on the Z-axis. Default value: 0

(0: disabled; 1: enabled)

1. When the MIPI I3C® interface is used, this bit must be set to 0.

IIS2DULPX

DS14580 - Rev 1

page 41/106

IIS2DULPX Datasheet(PDF) 41 Page - STMicroelectronics

IIS2DULPX Datasheet(HTML) 41 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL