IIS2DULPX datasheet(27/106 Pages) STMICROELECTRONICS

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5.8

Machine learning core

The IIS2DULPX embeds a dedicated core for machine learning processing that provides system flexibility,

allowing some algorithms run in the application processor to be moved to the MEMS sensor with the advantage of

consistent reduction in power consumption.

Machine learning core logic allows identifying if a data pattern matches a user-defined set of classes. Typical

examples of applications could be activity detection like running, walking, driving, and so on.

The IIS2DULPX machine learning core works on data patterns coming from the accelerometer sensor, but it is

also possible to process the embedded temperature sensor data or the analog hub (AH) / Qvar data.

The input data can be filtered using a dedicated configurable computation block containing filters and features

computed in a fixed time window defined by the user. Computed feature values and filtered data values can also

be read through the FIFO buffer.

Machine learning processing is based on logical processing composed of a series of configurable nodes

characterized by "if-then-else" conditions where the "feature" values are evaluated against defined thresholds.

Figure 13. Machine learning core in the IIS2DULPX

Machine

learning core

logical processing

Sensor

data

Computation

block

Decision

tree

Accelerometer

Results

Temperature/AH/Qvar

Features

Filters

Meta-classifier

The IIS2DULPX can be configured to run up to 4 decision trees simultaneously and independently and every

decision tree can generate up to 16 results. The total number of nodes can be up to 128.

The results of the machine learning processing are available in dedicated output registers readable from the

application processor at any time.

The IIS2DULPX machine learning core can be configured to generate an interrupt when a change in the result

occurs.

5.9

Adaptive self-configuration (ASC)

The IIS2DULPX supports the adaptive self-configuration (ASC) feature, which allows the FSM to automatically

reconfigure the device in real time based on the detection of a specific motion pattern or based on the output of a

specific decision tree configured in the MLC, without any intervention from the host processor. The FSM can write

a subset of the device registers using the SETR command, which allows indicating the register address and the

new value to be written in such a register. The access to these device registers is mutually exclusive with respect

to the host.

IIS2DULPX

Digital main blocks and embedded low-power features

DS14580 - Rev 1

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