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TMP89FS60 Datasheet(PDF) 110 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 110 Page - Toshiba Semiconductor |
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110 / 410 page  Page 96 8. I/O Ports 8.3 I/O Port Registers TMP89FS60 RA005 Figure 8-3 Port P0 (P02, P03) Output latch (for each bit) P0DR2 write P02 (XTIN) R Rf P0PRD2 read Function control (for each bit) Input/output control (for each bit) P0FC2 write P0CR2 write VDD VDD Pull-up control (for each bit) P0PU2 write SYSCR2<XTEN> Output latch (for each bit) P0DR3 write P03 (XTOUT) R RIN3 RIN3 P0PRD3 read Input/output control (for each bit) P0CR3 write Programmable pull-up resistor Programmable pull-up resistor VDD VDD Pull-up control (for each bit) P0PU3 write SYSCR1<STOP> SYSCR1<OUTEN> Reset signal Note1 : R = 100 Ω (typ.) Note2 : Rf = 6M Ω (typ.) Note3 : Ro = 220k Ω (typ.) Note4 : RIN3 = 50k Ω (typ.) Ro |
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