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TMP89FS60 Datasheet(PDF) 111 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 111 Page - Toshiba Semiconductor |
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111 / 410 page  Page 97 TMP89FS60 RA005 Note: P0CR1 and P0CR0 must be clear to "0". Note 1: When SYSCR2<XEN> is "1", setting P0FC0 to "0" generates a system clock (internal factor) reset. Normally, ports P00 or P01 are not used as ports, so P0FC0 must be set to "1". Note 2: Symbol "I" means secondary function input Port P0 output latch P0DR (0x0000) 76543 210 Bit Symbol ---- P03 P02 P01 P00 Read/Write RRRR R/W R/W R/W R/W After reset 00000 000 Function 0: Outputs L level when the output mode is selected. 1: Outputs H level when the output mode is selected. Port P0 input/output control P0CR (0x0F1A) 76543 210 Bit Symbol ---- P0CR3 P0CR2 P0CR1 P0CR0 Read/Write RRRR R/W R/W R/W R/W After reset 00000 000 Function 0: Input mode (port input) 1: Output mode (port output) Port P0 function control P0FC (0x0F34) 76543 210 Bit Symbol ----- P0FC2 - P0FC0 Read/Write RRRRR R/W R R/W After reset 00000 001 Function 0: Port func- tion Port func- tion 1: XTIN (I) XIN (I) Port P0 built-in pull-up resistor control P0PU (0x0F27) 76543 210 Bit Symbol ---- P0PU2 P0PU2 P0PU1 P0PU0 Read/Write RRRR R/W R/W R/W R/W After reset 00000 000 Function 0: The built-in pull-up resistor is not connected. 1: The built-in pull-up resistor is connected. (The resistor is connected in the input mode only. Under any other con- ditions, setting to "1" does not make the resistor con- nected.) Port P0 input data P0PRD (0x000D) 76543 210 Bit Symbol ---- P0PRD3 P0PRD2 P0PRD1 P0PRD0 Read/Write RRRRRRRR After reset 0000 **** Function If the port is in the input mode, the contents of the port are read. If not, "0" is read. |
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