TMP89FS60 datasheet(152/410 Pages) TOSHIBA

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12. Time Base Timer (TBT)

12.1 Time Base Timer

TMP89FS60

RA001

Note 3: TBTCR<TBTCK> should be set when TBTCR<TBTEN> is "0".

Note 4: When SYSCR1<DV9CK> is "1" in the NORMAL 1/2 or IDLE1/2 mode, the interrupt request is subject to some fluctuations

to synchronize fs and fcgck.

Note 5: Bits 7 to 4 of TBTCR are read as "0".

12.1.3 Functions

Select the source clock frequency for the time base timer by TBTCR<TBTCK>. TBTCR<TBTCK> should

be changed when TBTCR<TBTEN> is "0". Otherwise, the INTTBT interrupt request is generated at unex-

pected timing.

Setting TBTCR<TBTEN> to "1" causes interrupt request signals to occur at the falling edge of the source

clock. When TBTCR<TBTEN> is cleared to "0", no interrupt request signal will occur.

When the operation is changed to the STOP mode, TBTCR<TBTEN> is cleared to "0".

The source clock of the time base timer operates regardless of the TBTCR<TBTEN> value.

A time base timer interrupt is generated at the first falling edge of the source clock after a time base timer

interrupt request is enabled. Therefore, the period from when the time TBTCR<TBTEN> is set to "1" to the

time when the first interrupt request occurs is shorter than the frequency period set at TBTCR<TBTCK>.

Figure 12-2 Time Base Timer Interrupt

When the operation is changed from NORMAL mode to SLOW mode or from SLOW mode to NORMAL

mode, The interrupt request will not occur at the expected timing due to synchronization of the gear clock

(fcgck) and the low-frequency clock (fs). It is recommened that the operation mode is changed when

TBTCR<TBTEN> is "0".

Table 12-1 Time Base Timer Interrupt Frequency (Example: when fcgck = 8.0 MHz and fs = 32.768

kHz)

TBTCK

Time base timer interrupt frequency [Hz]

NORMAL1/2, IDLE1/2 mode

SLOW1/2, SLEEP1 mode

DV9CK = 0

DV9CK = 1

000

1.91

001

7.63

010

244.14

128

Reserved

011

976.56

512

Reserved

100

1953.13

1024

Reserved

101

3906.25

2048

Reserved

110

7812.5

4096

Reserved

111

31250

Reserved

Example: Set the time base timer interrupt frequency to fcgck/215 [Hz] and enable interrupts.

Source clock

Time base timer enable

Interrupt period

TBTCR<TBTEN>

INTTBT interrupt

request

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