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TMP89FS60 Datasheet(PDF) 218 Page - Toshiba Semiconductor

Part # TMP89FS60
Description  8 Bit Microcontroller
PDF  410 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Datasheet(HTML) 218 Page - Toshiba Semiconductor

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Page 204
15. Real Time Clock (RTC)
15.3 Function
TMP89FS60
RA000
Note 1: fs: Low-frequency clock [Hz]
Note 2: RTCCR<RTCSEL> can be rewritten only when RTCCR<RTCRUN> is "0". If data is written into RTCCR<RTC-
SEL> when RTCCR<RTCRUN> is "1", the existing data remains effective. RTCCR<RTCSEL> can be rewritten at
the same time as enabling the real time clock, but it cannot be rewritten at the same time as disabling the real time
clock.
Note 3: If the real time clock is enabled and when 1) SYSCR2<XTEN> is cleared to "0" to stop the low-frequency clock
oscillation circuit or 2) the operation is changed to the STOP mode or the SLEEP0 mode, the data in
RTCCR<RTCSEL> is maintained and RTCCR<RTCRUN> is cleared to "0".
15.3 Function
15.3.1 Low Power Consumption Function
Real time clock has the low power consumption registers (POFFCR2) that save power when the real time
clock is not being used.
Setting POFFCR2<RTCEN> to "0" disables the basic clock supply to real time clock to save power. Note
that this renders the real time clock unusable. Setting POFFCR2<RTCEN> to "1" enables the basic clock sup-
ply to real time clock and allows the real time clock to operate.
After reset, POFFCR2<RTCEN> are initialized to "0", and this renders the real time clock unusable. When
using the real time clock for the first time, be sure to set POFFCR2<RTCEN> to "1" in the initial setting of the
program (before the real time clock control registers are operated).
Do not change POFFCR2<RTCEN> to "0" during the real time clock operation. Otherwise real time clock
may operate unexpectedly.
15.3.2 Enabling/disabling the real time clock operation
Setting RTCCR<RTCRUN> to "1" enables the real time clock operation. Setting RTCCR<RTCRUN> to "0"
disables the real time clock operation.
RTCCR<RTCRUN> is cleared to "0" just after reset release.
15.3.3 Selecting the interrupt generation interval
The interrupt generation interval can be selected at RTCCR<RTCSEL>.
RTCCR<RTCSEL> can be rewritten only when RTCCR<RTCRUN> is "0". If data is written into
RTCCR<RTCSEL> when RTCCR<RTCRUN> is "1", the existing data remains effective.
RTCCR<RTCSEL> can be rewritten at the same time as enabling the real time clock operation, but it cannot
be rewritten at the same time as disabling the real time clock operation.
RTCSEL
Selects the interrupt generation interval
000 : 215/fs (1.000 [s] @fs=32.768kHz)
001 : 214/fs (0.500 [s] @fs=32.768kHz)
010 : 213/fs (0.250 [s] @fs=32.768kHz)
011 : 212/fs (125.0 [ms] @fs=32.768kHz)
100 : 211/fs (62.50 [ms] @fs=32.768kHz)
101 : 210/fs (31.25 [ms] @fs=32.768kHz)
110 : 29/fs (15.62 [ms] @fs=32.768kHz)
111 : 28/fs (7.81 [ms] @fs=32.768kHz)
RTCRUN
Enables/disables the real time clock opera-
tion
0 : Disable
1 : Enable



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