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TMP89FS60 Datasheet(PDF) 222 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 222 Page - Toshiba Semiconductor |
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222 / 410 page  Page 208 16. Asynchronous Serial Interface (UART) 16.1 Configuration TMP89FS60 RA001 16.1 Configuration Figure 16-1 Asynchronous Serial Interface (UART) 8-bit counter 8-bit counter Y A B C S S A BY fcgck or fs Match detection EN EN Match detection Comparator Comparator Start bit detection Transmission start Stop bit Parity bit fcgck/2 6 fcgck/2 7 fcgck/2 8 PPGA0 output (TCA0 output) Baud rate generator Transmit RT clock Receive RT clock 2 4 2 2 2 Noise rejection circuit Shift register Shift register IrDA control S A BY Counter Counter Frequency divider UART0CR1 UART0 control register 1 INTTXD0 interrupt request INTRXD0 interrupt request UART0 transmit data buffer UART0 receive data buffer RXD0 TXD0 UART0CR1 RD0BUF UART0CR2 UART0SR UART0DR UART0 baud rate register UART0 status register UART0 control register 2 |
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