TMP89FS60 datasheet(269/410 Pages) TOSHIBA

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Page 255

TMP89FS60

RA001

(1)

When the internal clock is used

If SIO0SR<TBFL> is "1", it is cleared to "0" and the transmit/receive operation continues. If

SIO0SR<REND> is already "1", SIO0SR<OERR> is set to "1".

If SIO0SR<TBFL> is "0", the transmit/receive operation is aborted. The SCLK0 pin becomes the

initial state and the SO0 pin becomes the "H" level. SIO0SR<SEF> remains at "0". When the subse-

quent data is written to SIO0BUF, SIO0SR<SEF> is set to "1", the SCLK0 pin outputs the clock and

the transmit/receive operation is restarted. To confirm the receive data, read it from SIO0BUF before

writing data to SIO0BUF.

(2)

When an external clock is used

The transmit/receive operation continues. If the external serial clock is input without writing any

data to SIO0BUF, the last data value set to SIO0BUF is re-transmitted. At this time, the transmit

underrun error flag SIO0SR<UERR> is set to "1".

When the next 8-bit data is received completely before SIO0BUF is read, or in the state of

SIO0SR<REND>="1", SIO0SR<OERR> is set to "1".

17.5.3.5 Stopping the transmit/receive operation

Set SIO0CR<SIOS> to "0" to stop the transmit/receive operation. When SIO0SR<SEF> is "0", or when

the shift operation is not in progress, the operation is stopped immediately. Unlike the transmit mode, no

INTSIO0 interrupt request is generated in this state.

When SIO0SR<SEF> is "1", the operation is stopped after the 8-bit data is received completely. At this

time, an INTSIO0 interrupt request is generated.

After the operation has stopped completely, SIO0SR<SIOF, SEF and TBFL> are cleared to "0". Other

SIO0SR registers keep their values.

If the internal clock has been used, the SO0 pin automatically returns to the "H" level. If an external

clock has been used, the SO0 pin keeps the last output value. To return the SO0 pin to the "H" level, write

"00" to SIO0CR<SIOM> when the operation is stopped.

The transmit/receive operation can be forced to stop by setting SIO0CR<SIOM> to "00" during the

operation. By setting SIO0CR<SIOM> to "00", SIO0CR<SIOS> and SIO0SR are cleared to "0" and the

SIO stops the operation, regardless of the SIO0SR<SEF> value. The SO0 pin becomes the "H" level. If

the internal clock is selected, the SCLK0 pin returns to the initial level.

TMP89FS60 Datasheet(PDF) 269 Page - Toshiba Semiconductor