TMP89FS60 datasheet(298/410 Pages) TOSHIBA

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18. Serial Bus Interface (SBI)

18.5 Data Transfer of I2C Bus

TMP89FS60

RA001

Check SBI0SR2<LRB> until it becomes "1" to check that the SCL line on the bus is not pulled down to the

low level by other devices.

After confirming that the bus stays in a free state, generate a start condition in the procedure "18.5.2 Start

condition and slave address generation".

In order to meet the setup time at a restart, take at least 4.7

µs of waiting time by the software in the standard

mode I2C bus standard or at least 0.6

µs of waiting time in the fast mode I2C bus standard from the time of

restarting to confirm that a bus is free until the time to generate a start condition.

Note:When the master is in the receiver mode, it is necessary to stop the data transmission from the slave device

before the STOP condition is generated. To stop the transmission, the master device make the slave device

receiving a negative acknowledge. Therefore, SBI0SR2<LRB> is "1" before generating the Restart and it can

not be confirmed that SCL line is not pulled down by other devices. Please confirm the SCL line state by read-

ing the port.

Figure 18-22 Timing Diagram When Restarting

Example :Generate a restart

(SBI0CR2), 0x18

; Sets SBI0CR2<MST>, <TRX> and <BB> to "0" and SBI0CR2<PIN> to

"1"

CHK_BB:

TEST

(SBI0SR2).BB

; Waits until SBI0SR2<BB> becomes "0"

T, CHK_BB

CHK_LRB:

TEST

(SBI0SR2).LRB

; Waits until SBI0SR2<LRB> becomes "1"

F, CHK_LRB

; Wait time process by the software

(SBI0CR2), 0xf8

; Sets SBI0CR2<MST>, <TRX>, <BB> and <PIN> to "1"

Start condition

4.7

µs min. in the normal mode or

0.6

µs min. in the fast mode

SBI0CR2<MST>="0"

SBI0CR2<TRX>="0"

SBI0CR2<BB>="0"

SBI0CR2<PIN>="1"

SCL0 pin

SCL (Bus)

SDA0 pin

SBI0SR2<LRB>

SBI0SR2<BB>

SBI0CR2<PIN>

SBI0CR2<PIN>="1"

SBI0CR2<BB>="1"

SBI0CR2<TRX>="1"

SBI0CR2<MST>="1"

TMP89FS60 Datasheet(PDF) 298 Page - Toshiba Semiconductor

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