Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

TMP89FS60 Datasheet(PDF) 299 Page - Toshiba Semiconductor

Part # TMP89FS60
Description  8 Bit Microcontroller
PDF  410 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Datasheet(HTML) 299 Page - Toshiba Semiconductor

Back Button TMP89FS60 Datasheet HTML 295Page - Toshiba Semiconductor TMP89FS60 Datasheet HTML 296Page - Toshiba Semiconductor TMP89FS60 Datasheet HTML 297Page - Toshiba Semiconductor TMP89FS60 Datasheet HTML 298Page - Toshiba Semiconductor TMP89FS60 Datasheet HTML 299Page - Toshiba Semiconductor TMP89FS60 Datasheet HTML 300Page - Toshiba Semiconductor TMP89FS60 Datasheet HTML 301Page - Toshiba Semiconductor TMP89FS60 Datasheet HTML 302Page - Toshiba Semiconductor TMP89FS60 Datasheet HTML 303Page - Toshiba Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 299 / 410 page
background image
Page 285
TMP89FS60
RA001
18.6 AC Specifications
The AC specifications are as listed below.
The operating mode (fast or standard) mode should be selected suitable for frequency of fcgck. For these operating
mode, refer to the following table.
Note: For m and n, refer to"18.4.4.1 Clock source".
Figure 18-23 Definition of Timing (No. 1)
Table 18-6 AC Specifications (Circuit Output Timing)
Parameter
Symbol
Standard mode
Fast mode
Unit
MIN.
MAX.
MIN.
MAX.
SCL clock frequency
fSCL
0
fcgck / (m+n)
0
fcgck / (m+n)
kHz
Hold time (re)start condition. This
period is followed by generation of the
first clock pulse.
tHD;STA
m / fcgck
-
m / fcgck
-
µs
Low-level period of SCL clock (output)
tLOW
n / fcgck
-
n / fcgck
-
µs
High-level period of SCL clock (output)
tHIGH
m / fcgck
-
m / fcgck
-
µs
Low-level period of SCL clock (input)
tLOW
5 / fcgck
-
5 / fcgck
-
µs
High-level period of SCL clock (input)
tHIGH
3 / fcgck
-
3 / fcgck
-
µs
Restart condition setup time
tSU;STA
Depends on
the software
-
Depends on
the software
-
µs
Data hold time
tHD;DAT
0
5 / fcgck
0
5 / fcgck
µs
Data setup time
tSU;DAT
250
-
100
-
ns
Rising time of SDA and SCL signals
tr
-
1000
-
300
ns
Falling time of SDA and SCL signals
tf
-
300
-
300
ns
Stop condition setup time
tSU;STO
m / fcgck
-
m / fcgck
-
µs
Bus free time between the stop condi-
tion and the start condition
tBUF
Depends on
the software
-
Depends on
the software
-
µs
Time before rising of SCL after
SBICR2<PIN> is changed from "0" to
"1"
tSU;SCL
n / fcgck
-
n / fcgck
-
µs
t
LOW
t
f
t
f
t
SU;STA
t
SU;STO
t
BUF
t
HD;STA
t
r
t
SU;DAT
t
HD;STA
t
HIGH
t
HD;DAT
t
f



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com