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PAC1721 Datasheet(PDF) 19 Page - Microchip Technology

Part # PAC1721
Description  Single-Channel Power Monitor with Accumulator, 9V Full Scale Range
PDF  92 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PAC1721 Datasheet(HTML) 19 Page - Microchip Technology

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 2026 Microchip Technology Inc. and its subsidiaries
DS-20007088A-page 19
PAC1721
Use Equation 4-4 to calculate the real value of VSENSE.
EQUATION 4-4:
4.6
FSR/2 Modes
FSR/2 mode allows the use of a reduced FSR. This can
be divided by a factor of two for VSENSE and/or VBUS
and it can be selected for both voltages by configuring
the NEG_PWR_FSR register:
•VBUS → CFG_VB[1:0] = 10b
•VSENSE → CFG_VS[1:0] = 10b
4.7
ADC Measurements, Offset and
Averaging
PAC1721 is primarily used for energy measurements
where many power calculations are accumulated. This
is inherently an averaging process. Individual voltage
and current measurements can also benefit from aver-
aging to reduce noise and offset. The averaged values
are internally calculated for VBUS and VSENSE.
Rolling averages of the most recent samples are stored
in the VBUS_AVG and VSENSE_AVG registers. The
rolling averages update internally after every complete
conversion cycle, while readable registers are updated
using Refresh (any) commands. Use these averaged
results to obtain the most accurate, lowest noise
measurements.
Results from both VBUS and VSENSE ADCs are 12-bit
2's complement signed numbers. Conversion results
are stored as unipolar or bipolar numbers based on
NEG_PWR_FSR register settings. Besides measuring
bipolar currents (charging/discharging) and voltages
that can drop below ground level, bipolar numbers can
give more accurate results for very small values that
may actually be negative for some readings. For more
details, see Register 6-20.
PAC1721 calculates the mean value for both VBUS and
VSENSE by averaging the most recent voltage samples.
The number of samples (measurements) included in
the rolling average is determined by the AVERAGE[2:0]
bits in the CONTROL register. By default, these bits are
set to 001b, equivalent to using the most recent eight
measurements to determine rolling averages.
PAC1721 stores the rolling averages of the most recent
VBUS and VSENSE samples in the VBUS_AVG and
VSENSE_AVG registers. After POR, these registers
start representing accurate voltage averages only after
the minimum required number of samples/completed
conversion cycles is reached. Set the AVERAGE[2:0]
bits in the CONTROL register so that PAC1721 uses
the most recent 4, 8, 16, 32, 64 or 128 samples when
calculating the rolling VBUS and VSENSE averages. For
more details, see Register 6-2.
The VBUS_AVG and VSENSE_AVG registers update
after every completed conversion cycle. Refresh (any)
commands update these registers like any readable
register. For details, see Register 6-7 and Register 6-8.
TABLE 4-1:
FSR/2 – VBUS
VBUS Range
FSR = 9V, FSR/2 = 4.5V
Unipolar 0-FSR
2.2 mV/LSB
Bipolar ± FSR
4.4 mV/LSB
Bipolar ± FSR/2
2.2 mV/LSB
TABLE 4-2:
FSR/2 – VSENSE
VSENSE Range
FSR = 100 mV, FSR/2 = 50 mV
Unipolar 0-FSR
24.414 µV/LSB
Bipolar ± FSR
48.828 µV/LSB
Bipolar ± FSR/2
24.414 µV/LSB
Where:
VSENSE = Sense Voltage (V)
LSB(VSENSE) = LSBs of the VSENSE measurement
FSVSENSE = Full Scale Voltage for VSENSE (V):
• 100 mV for Unipolar mode
• 200 mV for Bipolar mode
• 100 mV for Bipolar FSR/2 mode
212 = 12-bit Resolution Denominator
CONV(VSENSE) = Converted analog-to-digital value, from
hexadecimal to decimal, read from the
VSENSE register
LSB VSENSE

FSVSENSE
2
12
-------------------------
=
VSENSE
LSB VSENSE
 CONV VSENSE

=
Note:
Using the full resolution of the device
can impact NEG_PWR_FSR register
settings. For example, if conversion
results are stored as unipolar numbers
and a negative value is converted, the
average result includes the signed
negative value and produces a different
value than just averaging the VBUS or
VSENSE register.



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