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PAC1721 Datasheet(PDF) 75 Page - Microchip Technology

Part # PAC1721
Description  Single-Channel Power Monitor with Accumulator, 9V Full Scale Range
PDF  92 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PAC1721 Datasheet(HTML) 75 Page - Microchip Technology

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 2026 Microchip Technology Inc. and its subsidiaries
DS-20007088A-page 75
PAC1721
REGISTER 6-35:
STEP_LIMIT (ADDRESS 22H)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
RV[1:0]
FV[1:0]
RC[1:0]
FC[1:0]
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as 0
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
X = Bit is unknown
This register detects changes in the voltage or current average value. The value that is currently stored in the
VBUS_AVG or VSENSE_AVG register is compared to the previously stored value.
This average value is programmable.
Note 1: The STEP_LIMIT register uses VBUS_AVG and VSENSE_AVG data. These two registers use full signed
values for ADC data regardless of the settings in the NEG_PWR_FSR register. This can results in an
unexpected step limit excursion.
2: Disable alerts in the ALERT_ENABLE register before making changes to the STEP_LIMIT register to
avoid false triggers.
bit 7:6
RV[1:0]: Configure Rising Voltage limit.
When VBUS increases, the new average value is checked to determine if the voltage increase is greater
than the previous average stored in the VBUS_AVG register by a certain percent.
00b = 25% (default)
01b = 50%
10b = 75%
11b = 100%
bit 5:4
FV[1:0]: Configure Falling Voltage limit.
When VBUS decreases, the new average value is checked to determine if the voltage decrease is lesser
than the previous average stored in the VBUS_AVG register by a certain percent.
00b = 25% (default)
01b = 50%
10b = 75%
11b = 100%
bit 3:2
RC[1:0]: Configure Rising Current limit.
When VSENSE increases, the new average value is checked to determine if the voltage increase is
greater than the previous average stored in the VSENSE_AVG register by a certain percent.
00b = 25% (default)
01b = 50%
10b = 75%
11b = 100%
bit 1:0
FC[1:0]: Configure Falling Current limit.
When VSENSE decreases, the new average value is checked to determine if the voltage decrease is
lesser than the previous average stored in the VSENSE_AVG register by a certain percent.
00b = 25% (default)
01b = 50%
10b = 75%
11b = 100%



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