PAC1721 datasheet(29/92 Pages) MICROCHIP

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DS-20007088A-page 29

PAC1721

5.3

SMBus and I2C Compatibility

PAC1721 is compatible with the SMBus and I2C serial

communication protocols:

• SMBus 3.1 1 MHz class

•I2C 1 MHz Fast-mode Plus

•I2C 3.4 MHz High-speed mode

Following are the major differences between SMBus

and I2C devices. For more details, refer to the SMBus

3.1 and I2C specifications.

• If SMBus Timeout is enabled, the minimum required

frequency for SMBus communications is 10 kHz.

If SMBus Timeout is disabled, PAC1721 operates

without following the SMBus specifications and

there is no minimum frequency for communications.

•I2C does not have a timeout. This is the default

condition. If SMBus Timeout is enabled, the SMBus

interface resets after the clock is pulled high for

tTIMEOUT. For details, see Section 5.2.

•I2C devices do not support the Alert Response

Address (ARA) functionality (optional for SMBus).

PAC1721 also does not support this feature.

Instead, pin A0/A1 configured as ALERT pin is an

open-drain output that can be monitored by the host

or an embedded controller to detect alert conditions.

Upon detection, the controller reads the

ALERT_STATUS register, determines the alert type

and then acts upon it according to its programming.

•I2C devices support Block Read and Block Write

differently. The I2C protocol allows the sending of an

unlimited number of bytes in either direction.For

Block Read and Block Write, the SMBus protocol

requires the transmission of an additional data byte

indicating the number of bytes to read or write.

PAC1721 supports the I2C protocol for Block Read

by default (does not send byte count information).

If the BYTE_COUNT bit is set to 1b in register

SMBUS_SETTINGS, PAC1721 sends the byte

count as the first data byte in response to the Block

Read, as described by the SMBus protocol.

• SMBus uses fixed logic thresholds for logical high

and logic low signals, while I2C uses levels that are

proportional to VDD. PAC1721 uses the SMBus

method – fixed logic levels relative to the internal

1.8V (regulated) power supply according to the

SMBus specifications:

◦ Input High Voltage: VIH = 1.35V

◦ Input Low Voltage: VIL = 0.8V

5.4

SMBus and I2C Standard Protocol

The following are valid PAC1721 commands:

• Read Byte

• Write Byte

• Block Read

• Block Write (I2C only)

• Send Byte

•Receive Byte

While PAC1721 responds to the I2C General Call

Address (0000 000b), it does not respond to the

SMBus Alert Response Address (0001 100b).

All protocol packets present throughout this document,

use the convention in Table 5-2.

5.5

Auto-incrementing Pointer

PAC1721 has an auto-incrementing address pointer.

The pointer has two loops for auto-incrementing:

a READ loop and a WRITE loop.

While the READ loop includes all of the data and

configuration registers, the WRITE loop includes only

the configuration registers.

Figure 5-2 shows how the auto-incrementing READ

loop works for reading. It also shows how the WRITE

loop functions with any refresh command.

Note 1: By default, SMBus Timeout is disabled.

2: To enable the SMBus Timeout feature,

set the TIMEOUT bit to 1b in the

SMBUS_SETTINGS register.

3: Disable SMBus Timeout in I2C clock

stretching conditions.

TABLE 5-2:

PROTOCOL PACKET

DATA SENT TO

DEVICE

DATA SENT TO THE

HOST

Number of bits sent

Note:

READ and WRITE loops do not include

Refresh (any) commands.

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