PAC1721 datasheet(14/92 Pages) MICROCHIP

14 / 92 page

PAC1721

DS-20007088A-page 14

 2026 Microchip Technology Inc. and its subsidiaries

4.0

DEVICE DESCRIPTION

This section describes the functional requirements of

PAC1721 presented in the Functional Block Diagram.

4.1

Definitions

I. VBUS is the system bus voltage measured across:

•For 8-Lead VDFN: VSENSE+ pin to GND

•For 10-Lead VDFN: VBUS+ pin to GND

For more details, see Section 4.3.

II. VSENSE is the sense input voltage measured across

an external current shunt resistor, RSHUNT. The differ-

ential voltage is measured between the VSENSE+ and

VSENSE– pins. For more details, see Section 4.4.

III. VPOWER is the result of multiplying VBUS and

VSENSE samples together: VPOWER = VBUS × VSENSE.

Use VPOWER to calculate the actual electrical power.

For details, see Section 4.8.

IV. A conversion cycle is the time period during which

PAC1721 performs the following operations in order:

Sample VBUS and then VSENSE

Convert VBUS and VSENSE results from analog

to digital values

Calculate VPOWER

Accumulate VPOWER results

V. PAC1721 supports the following three commands:

Refresh, Refresh_G and Refresh_V. Throughout the

document, the term “Refresh (any)” refers to situations

when any of the three refresh commands can be used.

4.2

Detailed Description

The input pins to VBUS and VSENSE connect directly to

their own amplifiers. The outputs of these amplifiers are

sampled serially for both VBUS and VSENSE. Offset is

removed using a modified correlated double sampling

method, while the gain error is calibrated in production.

After every completed conversion, VBUS and VSENSE

are multiplied together to produce VPOWER.

PAC1721 has a single 12-bit ADC that is managed by

its own internal oscillator and digital logic.

When a Refresh (any) command is issued, measure-

ments update 1 µs after the current conversion cycle

completes. The timing depends on the selected sample

rate and the moment the Refresh (any) command was

issued.

4.2.1

INITIAL OPERATION

After POR and the start-up sequence, PAC1721 enters

Active state and begins sequentially sampling device

inputs. PAC1721 first samples voltage and current,

then calculates the instantaneous electrical power and

sums the result in the power accumulator.

PAC1721 has a default sample rate of 1,024 sps. It can

be programmed over I2C or SMBus. Pin A0 or A1 can

operate as the SLOW pin (see Section 4.2.8). Holding

the SLOW pin high overrides the programmed sample

rate, gathering 8 sps (Slow mode). When sampling at

rates lower than the maximum of 8,192 sps, PAC1721

enters a low-power state (no sampling) for a portion of

the conversion cycle, resulting in minimum power

dissipation.

A Refresh command updates the data registers (see

Section 6.2) and resets the accumulator (VACC) and

the accumulator count (ACC_COUNT) registers. To

update data registers without resetting the VACC or

ACC_COUNT registers, issue a Refresh_V command.

Issue a Refresh or Refresh_V command to activate

changes to the CONTROL register. When writing to this

conversion cycle (active sampling) or before the next

conversion cycle that follows a Refresh or Refresh_V

command.

Note:

When enabled, Auto-refresh changes this

operation. For details, see Section 4.2.5.

4.2.2

REFRESH COMMAND

The host sends a Refresh command after changing the

CONTROL register and/or before reading accumulator

data from PAC1721. This is used by the host to control

the accumulation period.

Note:

Various registers require a Refresh (any)

command to activate new settings.

Data registers for VBUS, VSENSE, VPOWER, accumulator

and accumulator count update with every Refresh

command and their values become static until the next

Refresh command. These data registers become

ready-to-read within one conversion cycle after issuing

a Refresh command. The registers can be read by the

host at any time up until the next Refresh command

issues. For more details, see Register 6-1.

Note 1: Refresh commands reset the accumulator

and accumulator count. However, they do

not reset input sampling, data conversion

and power integration. These continue as

set by the CONTROL register.

2: Changes to control and configuration regis-

ters take effect one conversion cycle after

issuing a Refresh command.

Note:

The duration of a conversion cycle, tCC,

varies with the selected sample rate, ƒS:

tCC = 1/ƒS

•ƒS = 8 sps → tCC = 125 ms

•ƒS = 1,024 sps → tCC = 977 µs

•ƒS = 8,192 sps → tCC = 122 µs

PAC1721 Datasheet(PDF) 14 Page - Microchip Technology

PAC1721 Datasheet(HTML) 14 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Download

Link URL