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PAC1721 Datasheet(PDF) 35 Page - Microchip Technology |
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PAC1721 Datasheet(HTML) 35 Page - Microchip Technology |
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35 / 92 page  2026 Microchip Technology Inc. and its subsidiaries DS-20007088A-page 35 PAC1721 6.0 REGISTER DESCRIPTION Table 6-1 presents the PAC1721 registers arranged in hexadecimal order based on their register address. TABLE 6-1: PAC1721 REGISTERS Register Name and Address Description Type Bytes POR Value REFRESH (Address 00h) Send Byte for Refresh command SEND 0 00h CONTROL (Address 01h) Configure sample rate, pins A0/A1 and more R/W 2 2520h ACC_COUNT (Address 02h) Accumulator count R 4 000000h VACC (Address 03h) Accumulator R 7 00000000000000h VBUS (Address 04h) VBUS measurement Block Read 2 0000h VSENSE (Address 05h) VSENSE measurement Block Read 2 0000h VBUS_AVG (Address 06h) Rolling average of most recent VBUS measurements Block Read 2 0000h VSENSE_AVG (Address 07h) Rolling average of most recent VSENSE measurements Block Read 2 0000h VPOWER (Address 08h) VPOWER calculation: VSENSE × VBUS Block Read 4 00000000h VBUS_MIN (Address 09h) Minimum value measured on VBUS Block Read 2 0000h VBUS_MAX (Address 0Ah) Maximum value measured on VBUS Block Read 2 0000h VSENSE_MIN (Address 0Bh) Minimum value measured on VSENSE Block Read 2 0000h VSENSE_MAX (Address 0Ch) Maximum value measured on VSENSE Block Read 2 0000h VPOWER_MIN (Address 0Dh) Minimum calculated value for VPOWER Block Read 4 00000000h VPOWER_MAX (Address 0Eh) Maximum calculated value for VPOWER Block Read 4 00000000h CONTROL_LAT (Address 0Fh) Latched active settings for CONTROL register R2 2520h NEG_PWR_FSR_LAT (Address 10h) Latched active settings for NEG_PWR_FSR register R1 00h ALERT_STATUS (Address 11h) Read to determine the cause that triggered an alert RC 2 0000h SMBUS_SETTINGS (Address 12h) Activate SMBus functionality, I/O data for R/W on I/O pins R/W 1 10h NEG_PWR_FSR (Address 13h) Configuration control for bipolar current and voltage R/W 1 00h REFRESH_G (Address 14h) Refresh response to General Call Address command SEND 0 00h REFRESH_V (Address 15h) Refreshes VBUS and VSENSE data only, no accumulator or accumulator count reset SEND 0 00h SLOW (Address 16h) Status and control for SLOW pin functions R/W 1 00h CONTROL_ACT (Address 17h) Currently active settings for CONTROL register R2 2520h Note 1: Unimplemented/reserved bits in registers can be read and written, but they do not impact any internal functionality. 2: If the data written to a register is less than the full register size, the data is written to the register’s MSBs. |
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