PAC1721 datasheet(17/92 Pages) MICROCHIP

17 / 92 page

 2026 Microchip Technology Inc. and its subsidiaries

DS-20007088A-page 17

PAC1721

Whenever the SLOW pin is pulled high, PAC1721 itself

can execute a Limited Refresh or Refresh_V command;

default is Refresh. The Limited Refresh or Refresh_V

command behaves like its counterpart, except that

programmed changes to the configuration or status

registers do not take effect. Data registers are updated

and are ready-to-read within one conversion cycle after

the SLOW pin transition.

The SLOW register allows to:

• Select between issuing a Limited Refresh or

Refresh_V command on SLOW pin transitions.

• Enable or disable Limited Refresh or Refresh_V

commands for either signal edge of the SLOW pin.

• Track the state of the SLOW pin and its transitions.

For details, see Register 6-23.

4.2.9

OPERATION OF SAMPLE MODES

1010B AND 1011B

PAC1721 has multiple sample modes available for

selection. Among them, there are two sample modes

that lock the ADC to a specific input:

• Sample mode 1010b only samples input VBUS at

16,384 sps

• Sample mode 1011b only samples input VSENSE at

16,384 sps

4.2.9.1

Sample Mode 1010b

While operating in sample mode 1010b, PAC1721 only

measures VBUS and not VSENSE. However, the device

uses the last available VSENSE value to approximate

VPOWER. The newly measured VBUS value and the last

available VSENSE value are multiplied together. The

result is a quasi-VPOWER value that can be used as an

estimate of the actual VPOWER. PAC1721 also uses this

result to update VPOWER registers, including VPOWER,

VPOWER_MIN and VPOWER_MAX.

Registers associated with VSENSE, including VSENSE,

VSENSE_AVG, VSENSE_MIN and VSENSE_MAX,

keep their most recent valid results even after a

Refresh (any) command occurs.

The accumulator operates as normal. No registers are

skipped over during auto-incrementing.

4.2.9.2

Sample Mode 1011b

While operating in sample mode 1011b, PAC1721 only

measures VSENSE and not VBUS. However, the device

uses the last available VBUS value to approximate

VPOWER. The newly measured VSENSE value and the

last available VBUS value are multiplied together. The

result is a quasi-VPOWER value that can be used as an

estimate of the actual VPOWER. PAC1721 also uses this

result to update VPOWER registers, including VPOWER,

VPOWER_MIN and VPOWER_MAX.

Registers associated with VBUS, including VBUS,

VBUS_AVG, VBUS_MIN and VBUS_MAX, keep their

most recent valid result even after a Refresh (any)

command occurs.

The accumulator operates as normal. No registers are

skipped over during auto-incrementing.

4.2.10

USING THE A0/A1 PINS AS I/O PINS

Pins A0 and A1 can be used as General Purpose Input/

Output (GPIO) pins when the A0/A1 pins are pulled up

to VDD. Enable this functionality in the CONTROL reg-

ister:

•Pin A0:

◦ GPIO digital input → SLOW_ALERT0[1:0] = 01b

◦ GPIO digital output → SLOW_ALERT0[1:0] = 10b

•Pin A1:

◦ GPIO digital input → GPIO_ALERT1[1:0] = 01b

◦ GPIO digital output → GPIO_ALERT1[1:0] = 10b

The SMBUS_SETTINGS register holds input data to

read and output data to write when A0/A1 is GPIO pin:

• GPIO_DATA0 bit for pin A0

• GPIO_DATA1 bit for pin A1

Note:

GPIO_DATA0 and GPIO_DATA1 are read

when A0/A1 function as GPIO inputs and

written when A0/A1 are as GPIO outputs.

Note:

If the Adaptive Accumulator function is

enabled while PAC1721 is sampling, the

bits in the SLOW register that control

Limited Refresh/Refresh_V commands

are set to 0b by default. These bits can

be set so that Limited Refresh/Refresh_V

commands still occur. For details, see

Section 4.8.1 and Register 6-23.

PAC1721 Datasheet(PDF) 17 Page - Microchip Technology

PAC1721 Datasheet(HTML) 17 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Download

Link URL