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PAC1721 Datasheet(PDF) 71 Page - Microchip Technology |
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PAC1721 Datasheet(HTML) 71 Page - Microchip Technology |
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71 / 92 page ![]() 2026 Microchip Technology Inc. and its subsidiaries DS-20007088A-page 71 PAC1721 REGISTER 6-28: ACC_FULL_LIMIT (ADDRESS 1BH) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 ACC_FULL[5:0] ACC_COUNT_FULL[1:0] bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as 0 -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared X = Bit is unknown This register is used to set a limit for how full the VACC and ACC_COUNT registers can be before the Accumulator Overflow and Accumulator Count Oveflow alerts are triggered. Any changes to this register become active after a Refresh (any) command is sent. Disable alerts in the ALERT_ENABLE register before making changes to the ACC_FULL_LIMIT register to avoid false triggers. bit 7:2 ACC_FULL[5:0]: These six bits are configurable to match the six MSBs of the VACC register. An alert triggers when the six MSBs of the VACC register ≥ the 6-bit value stored in ACC_FULL_LIMIT register. In bipolar mode, an alert triggers if the absolute value of the VACC register is more negative or more positive than the set limit. Setting this register to 3Fh does not generate an alert as this the maximum value that can be stored in the VACC register. bit 1:0 ACC_COUNT_FULL[1:0] Configure the fullness limit for the ACC_COUNT register. 00b = 100% Full 01b = 15/16 (~ 93%) Full (default) 10b = 7/8 (~ 87%) Full 11b = 3/4 (75%) Full |
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