PAC1721 datasheet(73/92 Pages) MICROCHIP

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DS-20007088A-page 73

PAC1721

OP_WARNING_LIMIT (ADDRESS 1EH)

OP_CRITICAL_LIMIT (ADDRESS 1FH)

R/W-0

OP_WARNING_LIMIT[15:8]

bit 15

bit 8

R/W-0

OP_WARNING_LIMIT[7:0]

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as 0

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

X = Bit is unknown

bit 7:0

OP_WARNING_LIMIT[15:0]: Configure the overpower (OP) warning limit as a 2’s complement number

for all current modes (unipolar or bipolar). This register functions as any limit register. However, it is

intended to provide a warning when overpower conditions occur.

Note:

Disable alerts in the ALERT_ENABLE register before making changes to the

OP_WARNING_LIMIT register to avoid false triggers.

R/W-0

OP_CRITICAL_LIMIT[15:8]

bit 15

bit 8

R/W-0

OP_CRITICAL_LIMIT[7:0]

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as 0

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

X = Bit is unknown

bit 7:0

OP_CRITICAL_LIMIT[15:0]: Configure the overpower (OP) critical limit as a 2’s complement number

for all current modes (unipolar or bipolar). This register functions as any limit register. However, it is

intended to provide a critical limit for overpower conditions.

Note:

Disable alerts in the ALERT_ENABLE register before making changes to the

OP_CRITICAL_LIMIT register to avoid false triggers.

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