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R7F100LLL3CFB Datasheet(PDF) 104 Page - Renesas Technology Corp |
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R7F100LLL3CFB Datasheet(HTML) 104 Page - Renesas Technology Corp |
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104 / 148 page ![]() RL78/L23 2. Electrical Characteristics R01DS0502EJ0110 Rev.1.10 Page 104 of 145 Oct 31, 2025 9. In simplified SPI (CSI) communications in the slave mode with devices operating at different voltage levels (1.8 V, 2.5 V, or 3 V) with the external SCKp clock (Notes and Caution are listed on the next page, and Remarks are listed on page 106.) (TA = -40 to +105°C, 1.8 V ≤ VDD ≤ 5.5 V, VSS = EVSS = 0 V) (1/2) Item Symbols Conditions HS (high-speed main) mode LS (low-speed main) mode LP (low-power main) mode Unit Min. Max. Min. Max. Min. Max. SCKp cycle timeNote 1 tKCY2 4.0 V ≤ VDD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V 24 MHz < fMCK 14/fMCK —— ns 20 MHz < fMCK ≤ 24 MHz 12/fMCK 12/fMCK —ns 8 MHz < fMCK ≤ 20 MHz 10/fMCK 10/fMCK —ns 4 MHz < fMCK ≤ 8 MHz 8/fMCK 8/fMCK —ns fMCK ≤ 4 MHz 6/fMCK 6/fMCK 10/fMCK ns 2.7 V ≤ VDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V 24 MHz < fMCK 20/fMCK —— ns 20 MHz < fMCK ≤ 24 MHz 16/fMCK 16/fMCK —ns 16 MHz < fMCK ≤ 20 MHz 14/fMCK 14/fMCK —ns 8 MHz < fMCK ≤ 16 MHz 12/fMCK 12/fMCK —ns 4 MHz < fMCK ≤ 8 MHz 8/fMCK 8/fMCK —ns fMCK ≤ 4 MHz 6/fMCK 6/fMCK 10/fMCK ns 1.8 V ≤ VDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V Note 2 24 MHz < fMCK 48/fMCK —— ns 20 MHz < fMCK ≤ 24 MHz 36/fMCK 36/fMCK —ns 16 MHz < fMCK ≤ 20 MHz 32/fMCK 32/fMCK —ns 8 MHz < fMCK ≤ 16 MHz 26/fMCK 26/fMCK —ns 4 MHz < fMCK ≤ 8 MHz 16/fMCK 16/fMCK —ns fMCK ≤ 4 MHz 10/fMCK 10/fMCK 10/fMCK ns |
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