LPC2921 datasheet(38/81 Pages) PHILIPS

38 / 81 page

LPC2921_2923_2925_0

Preliminary data sheet

Rev. 00.01 — 24 October 2008

38 of 81

NXP Semiconductors

LPC2921/2923/2925

ARM9 microcontroller with CAN and LIN

The actual PWM consists of two counters; a 16-bit prescale counter and a 16-bit PWM

counter. The position of the rising and falling edges of the PWM outputs can be

programmed individually. The prescale counter allows high system bus frequencies to be

scaled down to lower PWM periods. Registers are available to capture the PWM counter

values on external events.

Note that in the Modulation and Sampling SubSystem, each PWM has its individual clock

source CLK_MSCSS_PWMx (x runs from 0 to 3). Both the prescale and the timer

counters within each PWM run on this clock CLK_MSCSS_PWMx, and all time references

are related to the period of this clock. See Section 6.15 for information on generation of

these clocks.

6.14.5.2

Synchronizing the PWM counters

A mechanism is included to synchronize the PWM period to other PWMs by providing a

sync input and a sync output with programmable delay. Several PWMs can be

synchronized using the trans_enable_in/trans_enable_out and sync_in/sync_out ports.

See Figure 5 for details of the connections of the PWM modules within the MSCSS in the

LPC2921/2923/2925. PWM 0 can be master over PWM 1; PWM 1 can be master over

PWM 2, etc.

6.14.5.3

Master and slave mode

A PWM module can provide synchronization signals to other modules (also called Master

mode). The signal sync_out is a pulse of one clock cycle generated when the internal

PWM counter (re)starts. The signal trans_enable_out is a pulse synchronous to sync_out,

generated if a transfer from system registers to PWM shadow registers occurred when the

PWM counter restarted. A delay may be inserted between the counter start and

generation of trans_enable_out and sync_out.

A PWM module can use input signals trans_enable_in and sync_in to synchronize its

internal PWM counter and the transfer of shadow registers (Slave mode).

6.14.5.4

Pin description

Each of the four PWM modules in the MSCSS has the following pins. These are combined

with other functions on the port pins of the LPC2921/2923/2925. Table 21 shows the

PWM0 to PWM3 pins (n = 0 to 3).

Table 21.

PWM pins

Symbol

Pin name

Direction

Description

PWMn CAP[0]

PCAPn[0]

PWM n capture input 0

PWMn CAP[1]

PCAPn[1]

PWM n capture input 1

PWMn CAP[2]

PCAPn[2]

PWM n capture input 2

PWMn MAT[0]

PMATn[0]

OUT

PWM n match output 0

PWMn MAT[1]

PMATn[1]

OUT

PWM n match output 1

PWMn MAT[2]

PMATn[2]

OUT

PWM n match output 2

PWMn MAT[3]

PMATn[3]

OUT

PWM n match output 3

PWMn MAT[4]

PMATn[4]

OUT

PWM n match output 4

PWMn MAT[5]

PMATn[5]

OUT

PWM n match output 5

PWMn TRAP

TRAPn

PWM n trap input (on the LPC2921/2923/2925

n= 2, 3)

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