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LPC2921 Datasheet(PDF) 16 Page - NXP Semiconductors |
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LPC2921 Datasheet(HTML) 16 Page - NXP Semiconductors |
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16 / 81 page ![]() LPC2921_2923_2925_0 © NXP B.V. 2008. All rights reserved. Preliminary data sheet Rev. 00.01 — 24 October 2008 16 of 81 NXP Semiconductors LPC2921/2923/2925 ARM9 microcontroller with CAN and LIN [1] This clock is always on (cannot be switched off for system safety reasons) [2] In the peripheral subsystem parts of the Timers, watchdog timer, SPI and UART have their own clock source. See Section 6.12 for details. [3] In the Power Clock and Reset Control subsystem parts of the CGU, RGU, and PMU have their own clock source. See Section 6.15 for details. [4] The clock should remain activated when system wake-up on timer or UART is required. 6.8 Flash memory controller The flash memory has a 128-bit wide data interface and the flash controller offers two 128-bit buffer lines to improve system performance. The flash has to be programmed initially via JTAG. In-system programming must be supported by the bootloader. Flash memory contents can be protected by disabling JTAG access. Suspension of burning or erasing is not supported. The Flash Memory Controller (FMC) interfaces to the embedded flash memory for two tasks: • Memory data transfer • Memory configuration via triggering, programming, and erasing The key features are: BASE_UART_CLK CLK_UART0 UART 0 interface clock CLK_UART1 UART 1 interface clock BASE_ICLK0_CLK - clock for CGU1 input BASE_SPI_CLK CLK_SPI0 SPI 0 interface clock CLK_SPI1 SPI 1 interface clock CLK_SPI2 SPI 2 interface clock BASE_TMR_CLK CLK_TMR0 Timer 0 clock for counter part CLK_TMR1 Timer 1 clock for counter part CLK_TMR2 Timer 2 clock for counter part CLK_TMR3 Timer 3 clock for counter part BASE_ADC_CLK CLK_ADC1 Control of ADC 1, capture sample result CLK_ADC2 Control of ADC 2, capture sample result reserved - - BASE_ICLK1_CLK - clock for CGU1 input Table 8. CGU1 base clock and branch clock overview Base clock Branch clock name Parts of the device clocked by this branch clock Remark BASE_OUT_CLK CLK_OUT_CLK clock out pin BASE_USB_CLK CLK_USB_CLK USB clock Table 7. Base clock and branch clock overview …continued Base clock Branch clock name Parts of the device clocked by this branch clock Remark |
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