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ENC424J600 Datasheet(PDF) 87 Page - Microchip Technology |
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ENC424J600 Datasheet(HTML) 87 Page - Microchip Technology |
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87 / 168 page ![]() 2010 Microchip Technology Inc. DS39935C-page 85 ENC424J600/624J600 While transmission is active (TXRTS is set), it is recom- mended that ETXST and ETXLEN, as well as the TXMAC bit (ECON2<13>), not be modified. Since ERXST controls the end of the transmit buffer, and therefore, buffer wrap-around, it must also remain unchanged. To transmit a packet: 1. Initialize the MAC as described in Section 8.6 “MAC Initialization” . Most applications should leave PADCFG<3:0> and TXCRCEN set to their default values, which enables automatic padding and CRC generation. For automatic insertion of the source MAC address during transmission, set the TXMAC bit to ‘1’. 2. If desired, enable the transmit done and/or transmit abort interrupts by setting TXIE and/or TXABTIE (EIE<3:2>). Clear TXIF and TXABTIF (EIR<3:2>) if they are currently set. To generate the interrupt, also set INTIE (EIE<15>). 3. Copy the packet to the SRAM buffer. 4. Program ETXST to the start address of the packet. 5. Program ETXLEN with the length of data copied to the memory. 6. Set the TXRTS bit to initiate transmission. 7. Wait for the hardware to clear TXRTS and trigger a transmit interrupt, indicating transmission has completed. 8. Read the ETXSTAT register for status information as described in the next section. The transmit function does not modify the ETXST Pointer or ETXLEN data length after the operation completes. To send another packet, the Start Pointer must be manually moved to the location of the next packet and the transmit length must be updated. If desired, the application can retransmit the last packet by setting TXRTS again without modifying ETXST or ETXLEN. 9.1.1 TRANSMISSION STATUS After transmitting a packet (either successfully or unsuccessfully), the ETXSTAT and ETXWIRE registers contain status information about the operation. The values in these registers will persist until the next packet is transmitted (again, either successfully or unsuccessfully). Therefore, ETXSTAT and ETXWIRE should be treated as valid only when TXRTS is clear. The LATECOL (ETXSTAT<10>), MAXCOL (ETXSTAT<9>) and EXDEFER (ETXSTAT<8>) bits are error flags indicating that packet transmission has failed. (These errors are possible only in Half-Duplex mode; therefore, these status bits should be ignored when operating in Full-Duplex mode.) The device asserts these flags and clears the TXRTS bit to prevent a single packet from stalling device operation. When any of these flags are set, the packet was not success- fully transmitted and the host controller should determine whether to retry or ignore the error. The CRCBAD (EXTSTAT<4>) bit is a warning. It is only meaningful when automatic CRC generation is dis- abled and indicates that the checksum computed by the MAC did not match the one appended by software. If the software CRC is incorrect, the packet will be rejected by the remote node. When automatic MAC hardware generation of the CRC is enabled, this bit can be ignored as the CRC is always correct. The DEFER bit (ETXSTAT<7>) and the COLCNT<3:0> bits (ETXSTAT<3:0>) are status indicators. DEFER simply indicates that the device had to wait before transmitting due to flow control or other traffic on the network. The COLCNT bits indicate the number of collisions that occurred before the packet was successfully transmitted. The ETXWIRE register is a count of the number of actual bytes the MAC transmitted onto the physical medium before the transmission completed, either successfully or unsuccessfully. In Full-Duplex mode, this count is the total length of the packet, including padding and CRC. In Half-Duplex mode, this status register includes all extra bytes that were transmitted due to any collisions that occurred. Therefore, it can be used to gauge how much total bandwidth the application is using. 9.1.2 SPECIAL CASE TRANSMISSION When the value of ETXLEN is 07h or less, the ability to set the TXRTS bit is locked out in hardware. This is because the resulting packet would be unable to meet IEEE 802.3 requirements. If the PHY is unlinked at the time software sets the TXRTS bit to transmit a packet, the transmission will complete normally with applicable interrupts still occur- ring. However, the PHY submodule will also suppress the transmission of any data onto the physical medium. This avoids interference with auto-negotiation, which may be already using the physical medium. This behavior is also necessary to meet IEEE 802.3 specifications. If an attempt is made to transmit a packet that is larger than specified in the MAC Maximum Frame Length reg- ister, and huge frames are disabled (MACON2<2> = 0), the transmission will start normally. However, once the MAC has transmitted the number of bytes defined in MAMXFL, the MAC will immediately cease transmis- sion. This results in the packet being partially transmitted and then truncated without a valid CRC being appended. In almost all cases, this results in the remote node rejecting the packet as having an invalid CRC. |
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