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PIC16LC771 Datasheet(PDF) 41 Page - Microchip Technology |
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PIC16LC771 Datasheet(HTML) 41 Page - Microchip Technology |
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41 / 224 page ![]() 1999-2013 Microchip Technology Inc. DS41120C-page 41 PIC16C717/770/771 4.0 PROGRAM MEMORY READ (PMR) Program memory is readable during normal operation (full VDD range). It is indirectly addressed through the Special Function Registers: •PMCON1 •PMDATH •PMDATL • PMADRH • PMADRL When interfacing the program memory block, the PMDATH & PMDATL registers form a 2-byte word, which holds the 14-bit data. The PMADRH & PMADRL registers form a 2-byte word, which holds the 12-bit address of the program memory location being accessed. Mid-range devices have up to 8K words of program EPROM with an address range from 0h to 3FFFh. When the device contains less memory than the full address range of the PMADRH:PMARDL regis- ters, the Most Significant bits of the PMADRH register are ignored. 4.1 PMCON1 REGISTER PMCON1 is the control register for program memory accesses. Control bit RD initiates a read operation. This bit cannot be cleared, only set, in software. It is cleared in hard- ware at completion of the read operation. REGISTER 4-1: PROGRAM MEMORY READ CONTROL REGISTER 1 (PMCON1: 18Ch) 4.2 PMDATH AND PMDATL REGISTERS The PMDATH:PMDATL registers are loaded with the contents of program memory addressed by the PMADRH and PMADRL registers upon completion of a Program Memory Read command. R-1 U-0 U-0 U-0 U-0 U-0 U-0 R/S-0 Reserved — — — — — —RD bit 7 bit 0 bit 7 Reserved: Read as ‘1’ bit 6-1 Unimplemented: Read as '0' bit 0 RD: Read Control bit 1 = Initiates a Program memory read (read takes 2 cycles). RD is cleared in hardware. 0 = Reserved Legend: S = Settable (cleared in hardware) R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown |
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