S25FS256S datasheet(123/154 Pages) SPANSION

123 / 154 page

November 6, 2013 S25FS-S_00_04

S25FS-S Family

123

Da ta

Shee t

(Prelim i nar y )

10.7

One-Time Program Array Commands

10.7.1

OTP Program (OTPP 42h)

The OTP Program command programs data in the One-Time Program region, which is in a different address

space from the main array data. The OTP region is 1024 bytes so, the address bits from A31 to A10 must be

0 for this command. Refer to OTP Address Space on page 58 for details on the OTP region.

Before the OTP Program command can be accepted by the device, a Write Enable (WREN) command must

be issued and decoded by the device, which sets the Write Enable Latch (WEL) in the Status Register to

enable any write operations. The WIP bit in SR1V may be checked to determine when the operation is

completed. The P_ERR bit in SR1V may be checked to determine if any error occurred during the operation.

To program the OTP array in bit granularity, the rest of the bits within a data byte can be set to 1.

Each region in the OTP memory space can be programmed one or more times, provided that the region is not

locked. Attempting to program 0s in a region that is locked will fail with the P_ERR bit in SR1V set to 1.

Programming ones, even in a protected area does not cause an error and does not set P_ERR. Subsequent

OTP programming can be performed only on the un-programmed bits (that is, 1 data).

The protocol of the OTP Program command is the same as the Page Program command. See Page Program

(PP 02h or 4PP 12h) on page 114 for the command sequence.

10.7.2

OTP Read (OTPR 4Bh)

The OTP Read command reads data from the OTP region. The OTP region is 1024 bytes so, the address bits

from A31 to A10 must be zero for this command. Refer to OTP Address Space on page 58 for details on the

OTP region. The protocol of the OTP Read command is similar to the Fast Read command except that it will

not wrap to the starting address after the OTP address is at its maximum; instead, the data beyond the

maximum OTP address will be undefined. The OTP Read command read latency is set by the latency value

in CR2V[3:0].

See Fast Read (FAST_READ 0Bh or 4FAST_READ 0Ch) on page 106 for the command sequence.

10.8

Advanced Sector Protection Commands

10.8.1

ASP Read (ASPRD 2Bh)

The ASP Read instruction 2Bh is shifted into SI by the rising edge of the SCK signal. Then the 16-bit ASP

the SCK frequency by the falling edge of the SCK signal. It is possible to read the ASP register continuously

by providing multiples of 16 clock cycles. The maximum operating clock frequency for the ASP Read

(ASPRD) command is 133 MHz.

Figure 10.58 ASPRD Command

CS#

SCK

Phase

Instruction

Output ASPR Low Byte

Output ASPR High Byte

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