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S25FS256S Datasheet(PDF) 119 Page - SPANSION |
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S25FS256S Datasheet(HTML) 119 Page - SPANSION |
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119 / 154 page ![]() November 6, 2013 S25FS-S_00_04 S25FS-S Family 119 Da ta Shee t (Prelim i nar y ) 10.6.4 Evaluate Erase Status (EES D0h) The Evaluate Erase Status (EES) command verifies that the last erase operation on the addressed sector was completed successfully. If the selected sector was successfully erased the Erase Status bit (SR2V[2]) is set to 1. If the selected sector was not completely erased SR2V[2] is 0. The EES command can be used to detect erase operations failed due to loss of power, reset, or failure during the erase operation. The EES instruction is followed by a 3- or 4-byte address, depending on the address length configuration (CR2V[7]). The EES command requires tEES to complete and update the Erase Status in SR2V. The WIP bit (SR1V[0]) may be read using the RDSR1 (05h) command, to determine when the EES command is finished. Then the RDSR2 (07h) or the RDAR (65h) command can be used to read SR2V[2]. If a sector is found not erased with SR2V[2]=0, the sector must be erased again to ensure reliable storage of data in the sector. The Write Enable command (to set the WEL bit) is not required before the EES command. However, the WEL bit is set by the device itself and cleared at the end of the operation, as visible in SR1V[1] when reading status. Figure 10.51 EES Command Sequence Note: 1. A = MSB of address = A23 for CR2V[7]=0, or A31 for CR2V[7]=1. This command is also supported in QPI Mode. In QPI Mode the instruction is shifted in on IO0-IO3, two clock cycles per byte. Figure 10.52 EES QPI Mode Command Sequence Note: 1. A = MSB of address = A23 for CR2V[7]=0, or A31 for CR2V[7]=1. CS# SCK SI SO Phase 7 6 5 4 3 2 1 0 A 1 0 Instruction Address CS# SCLK IO0 IO1 IO2 IO3 Phase 4 0 A-3 4 0 5 1 A-2 5 1 6 2 A-1 6 2 7 3 A 7 3 Instructtion Address |
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