S25FS256S datasheet(116/154 Pages) SPANSION

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S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

Sheet

(Pre limin ar y)

Figure 10.46 Parameter Sector Erase (P4E 20h or 4P4E 21h) QPI Mode Command Sequence

Note:

1. A = MSB of address = A23 for P4E 20h with CR2V[7]=0, or A31 for P4E 20h with CR2V[7]=1 or 4P4E 21h.

10.6.2

Sector Erase (SE D8h or 4SE DCh)

The Sector Erase (SE) command sets all bits in the addressed sector to 1 (all bytes are FFh). Before the

Sector Erase (SE) command can be accepted by the device, a Write Enable (WREN) command must be

issued and decoded by the device, which sets the Write Enable Latch (WEL) in the Status Register to enable

any write operations.

The instruction

 D8h [CR2V[7]=0] is followed by a 3-byte address (A23-A0), or

 D8h [CR2V[7]=1] is followed by a 4-byte address (A31-A0), or

 DCh is followed by a 4-byte address (A31-A0)

CS# must be driven into the logic high state after the twenty-fourth or thirty-second bit of address has been

latched in on SI. This will initiate the erase cycle, which involves the pre-programming and erase of the

chosen sector. If CS# is not driven high after the last bit of address, the Sector Erase operation will not be

executed.

As soon as CS# is driven into the logic high state, the internal erase cycle will be initiated. With the internal

erase cycle in progress, the user can read the value of the Write-In Progress (WIP) bit to check if the

operation has been completed. The WIP bit will indicate a 1 when the erase cycle is in progress and a 0 when

the erase cycle has been completed.

A Sector Erase (SE) command applied to a sector that has been Write Protected through the Block Protection

bits or ASP, will not be executed and will set the E_ERR status.

A device configuration option (CR3V[1]) determines whether the SE command erases 64 kbytes or

256 kbytes. The option to use this command to always erase 256 kbytes provides for software compatibility

with higher density and future S25FS family devices.

A device configuration option (CR3V[3]) determines whether 4-kB parameter sectors are in use. When

CR3V[3] = 0, 4-kB parameter sectors overlay a portion of the highest or lowest address 32 kB of the device

address space. If a Sector Erase command is applied to a 64-kB sector that is overlaid by 4-kB sectors, the

overlaid 4-kB sectors are not affected by the erase. Only the visible (non-overlaid) portion of the 64-kB sector

appears erased. Similarly if a Sector Erase command is applied to a 256-kB range that is overlaid by 4-kB

sectors, the overlaid 4-kB sectors are not affected by the erase. When CR3V[3] = 1, there are no 4-kB

parameter sectors in the device address space and the Sector Erase command always operates on fully

visible 64-kB or 256-kB sectors.

ASP has a PPB and a DYB protection bit for each physical sector, including any 4-kB sectors. If a Sector

Erase command is applied to a 256-kB range that includes a 64-kB protected physical sector, the erase will

not be executed on the 256-kB range and will set the E_ERR status.

CS#

SCLK

IO0

IO1

IO2

IO3

Phase

A-3

A-2

A-1

Instructtion

Address

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