S25FS256S datasheet(115/154 Pages) SPANSION

115 / 154 page

November 6, 2013 S25FS-S_00_04

S25FS-S Family

115

Da ta

Shee t

(Prelim i nar y )

10.6

Erase Flash Array Commands

10.6.1

Parameter 4-kB Sector Erase (P4E 20h or 4P4E 21h)

The main flash array address map may be configured to overlay 4-kB parameter sectors over the lowest

address portion of the lowest address uniform sector (bottom parameter sectors) or over the highest address

portion of the highest address uniform sector (top parameter sectors). The main flash array address map may

also be configured to have only uniform size sectors. The parameter sector configuration is controlled by the

configuration bit CR3V[3]. The P4E and 4P4E commands are ignored when the device is configured for

uniform sectors only (CR3V[3]=1).

The parameter 4-kB Sector Erase commands set all the bits of a 4-kB parameter sector to 1 (all bytes are

FFh). Before the P4E or 4P4E command can be accepted by the device, a Write Enable (WREN) command

must be issued and decoded by the device, which sets the Write Enable Latch (WEL) in the Status Register

to enable any write operations.

The instruction

 20h [CR2V[7]=0] is followed by a 3-byte address (A23-A0), or

 20h [CR2V[7]=1] is followed by a 4-byte address (A31-A0), or

 21h is followed by a 4-byte address (A31-A0)

CS# must be driven into the logic high state after the twenty-fourth or thirty-second bit of the address has

been latched in on SI. This will initiate the beginning of internal erase cycle, which involves the pre-

programming and erase of the chosen sector of the flash memory array. If CS# is not driven high after the last

bit of address, the Sector Erase operation will not be executed.

As soon as CS# is driven high, the internal erase cycle will be initiated. With the internal erase cycle in

progress, the user can read the value of the Write-In Progress (WIP) bit to determine when the operation has

been completed. The WIP bit will indicate a 1. when the erase cycle is in progress and a 0 when the erase

cycle has been completed.

A P4E or 4P4E command applied to a sector that has been write protected through the Block Protection bits

or ASP, will not be executed and will set the E_ERR status. A P4E command applied to a sector that is larger

than 4 kbytes will not be executed and will not set the E_ERR status.

Figure 10.45 Parameter Sector Erase (P4E 20h or 4P4E 21h) Command Sequence

Note:

1. A = MSB of address = A23 for P4E 20h with CR2V[7]=0, or A31 for P4E 20h with CR2V[7]=1 or 4P4E 21h.

This command is also supported in QPI Mode. In QPI Mode the instruction is shifted in on IO0-IO3, two clock

cycles per byte.

CS#

SCK

Phase

Instruction

Address

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