S25FS256S datasheet(114/154 Pages) SPANSION

114 / 154 page

114

S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

Sheet

(Pre limin ar y)

10.5.2

Page Program (PP 02h or 4PP 12h)

The Page Program (PP) command allows bytes to be programmed in the memory (changing bits from 1 to 0).

Before the Page Program (PP) commands can be accepted by the device, a Write Enable (WREN) command

must be issued and decoded by the device. After the Write Enable (WREN) command has been decoded

successfully, the device sets the Write Enable Latch (WEL) in the Status Register to enable any write

operations.

The instruction

 02h (CR2V[7]=0) is followed by a 3-byte address (A23-A0) or

 02h (CR2V[7]=1) is followed by a 4-byte address (A31-A0) or

 12h is followed by a 4-byte address (A31-A0)

and at least one data byte on SI. Depending on CR3V[4], the page size can either be 256 or 512 bytes. Up to

a page can be provided on SI after the 3-byte address with instruction 02h or 4-byte address with instruction

12h has been provided.

If more data is sent to the device than the space between the starting address and the page aligned end

boundary, the data loading sequence will wrap from the last byte in the page to the zero byte location of the

same page and begin overwriting any data previously loaded in the page. The last page worth of data is

programmed in the page. This is a result of the device being equipped with a page program buffer that is only

page size in length. If less than a page of data is sent to the device, these data bytes will be programmed in

sequence, starting at the provided address within the page, without having any affect on the other bytes of the

same page.

Using the Page Program (PP) command to load an entire page, within the page boundary, will save overall

programming time versus loading less than a page into the program buffer.

The programming process is managed by the flash memory device internal control logic. After a programming

command is issued, the programming operation status can be checked using the Read Status Register 1

command. The WIP bit (SR1V[0]) will indicate when the programming operation is completed. The P_ERR bit

(SR1V[6]) will indicate if an error occurs in the programming operation that prevents successful completion of

programming. This includes attempted programming of a protected area.

Figure 10.43 Page Program (PP 02h or 4PP 12h) Command Sequence

Note:

1. A = MSB of address = A23 for PP 02h, or A31 for 4PP 12h.

This command is also supported in QPI Mode. In QPI Mode the instruction is shifted in on IO0-IO3, two clock

cycles per byte.

Figure 10.44 Page Program (PP 02h or 4PP 12h) QPI Mode Command Sequence

Note:

1. A = MSB of address = A23 for PP 02h, or A31 for 4PP 12h.

CS#

SCK

Phase

Instruction

Address

Input Data1

Input Data2

CS#

SCLK

IO0

IO1

IO2

IO3

Phase

A-3

A-2

A-1

Instruct.

Address

Input D1

Input D2

Input D3

Input D4

S25FS256S Datasheet(PDF) 114 Page - SPANSION

S25FS256S Datasheet(HTML) 114 Page - SPANSION

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL