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CP3SP33SMS/NOPB Datasheet(PDF) 24 Page - Texas Instruments |
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CP3SP33SMS/NOPB Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 407 page  CP3SP33 SNOSCW5 – MAY 2013 www.ti.com Table 5-1. Key to Operand Specifiers (continued) OPERAND SPECIFIER DESCRIPTION Rindex Index register RPbase, RPbasex Base register pair (relative mode) RPdest Destination register pair RPlink Link register pair Rposition Bit position in register Rproc 16-bit processor register Rprocd 32-bit processor register RPsrc Source register pair RPtarget Target register pair Rsrc, Rsrc1, Rsrc2 Source register Table 5-2. Instruction Set Summary MNEMONIC OPERANDS DESCRIPTION MOVi Rsrc/imm, Rdest Move MOVXB Rsrc, Rdest Move with sign extension MOVZB Rsrc, Rdest Move with zero extension MOVXW Rsrc, RPdest Move with sign extension MOVZW Rsrc, RPdest Move with zero extension MOVD imm, RPdest Move immediate to register-pair RPsrc, RPdest Move between register-pairs ADD[U]i Rsrc/imm, Rdest Add ADDCi Rsrc/imm, Rdest Add with carry ADDD RPsrc/imm, RPdest Add with RP or immediate. MACQWa Rsrc1, Rsrc2, RPdest Multiply signed Q15: M RPdest := RPdest + (Rsrc1 × Rsrc2) MACSWa Rsrc1, Rsrc2, RPdest Multiply signed and add result: M RPdest := RPdest + (Rsrc1 × Rsrc2) MACUWa Rsrc1, Rsrc2, RPdest Multiply unsigned and add result: M RPdest := RPdest + (Rsrc1 × Rsrc2) MULi Rsrc/imm, Rdest Multiply: Rdest(8) := Rdest(8) × Rsrc(8)/imm Rdest(16) := Rdest(16) × Rsrc(16)/imm MULSB Rsrc, Rdest Multiply: Rdest(16) := Rdest(8) × Rsrc(8) MULSW Rsrc, RPdest Multiply: RPdest := RPdest(16) × Rsrc(16) MULUW Rsrc, RPdest Multiply: RPdest := RPdest(16) × Rsrc(16); SUBi Rsrc/imm, Rdest Subtract: (Rdest := Rdest Rsrc/imm) SUBD RPsrc/imm, RPdest Subtract: (RPdest := RPdest RPsrc/imm) SUBCi Rsrc/imm, Rdest Subtract with carry: (Rdest := Rdest Rsrc/imm) CMPi Rsrc/imm, Rdest Compare Rdest Rsrc/imm CMPD RPsrc/imm, RPdest Compare RPdest RPsrc/imm BEQ0i Rsrc, disp Compare Rsrc to 0 and branch if EQUAL BNE0i Rsrc, disp Compare Rsrc to 0 and branch if NOT EQUAL ANDi Rsrc/imm, Rdest Logical AND: Rdest := Rdest & Rsrc/imm ANDD RPsrc/imm, RPdest Logical AND: RPdest := RPsrc & RPsrc/imm ORi Rsrc/imm, Rdest Logical OR: Rdest := Rdest | Rsrc/imm ORD RPsrc/imm, RPdest Logical OR: Rdest := RPdest | RPsrc/imm Scond Rdest Save condition code as boolean XORi Rsrc/imm, Rdest Logical exclusive OR: Rdest := Rdest ^ Rsrc/imm XORD RPsrc/imm, RPdest Logical exclusive OR: Rdest := RPdest ^ RPsrc/imm ASHUi Rsrc/imm, Rdest Arithmetic left/right shift ASHUD Rsrc/imm, RPdest Arithmetic left/right shift 24 CPU Architecture Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links :CP3SP33 |
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