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CP3SP33SMS/NOPB Datasheet(PDF) 33 Page - Texas Instruments |
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CP3SP33SMS/NOPB Datasheet(HTML) 33 Page - Texas Instruments |
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33 / 407 page  CPU Core AHB Bus (32-Bit) Teak DSP AHB Bus (32-Bit) Memory Interface Unit Teak 16-Bit Fixed-Point DSP 24K Bytes Data RAM DSP Interrupt Controller 24K Bytes Program RAM X Y Z P 4K Bytes Shared RAM External Bus Interface Unit Peripheral Bus Controller Shared Audio Peripheral APB Bus (32-Bit) CPU Peripheral APB Bus (32-Bit) Peripheral Bus Controller UART 3 ACCESS .bus 1 Microwire/ SPI 1 DS437 Telematics Codec Dual CVSD/PCM Converter Advanced Audio Interface I 2 S Interface CR16CPlus CPU Core with 4K Bytes Instr. Cache CPU DMA Controller CPU Interrupt Controller DSP DMA Controller Audio Subsystem Controller Interrupt Requests DMA Requests DMA Acknowledgements CPU Host Interface CP3SP33 www.ti.com SNOSCW5 – MAY 2013 Figure 9-1. DSP and Audio Peripherals Copyright © 2013, Texas Instruments Incorporated DSP and Audio Peripherals 33 Submit Documentation Feedback Product Folder Links :CP3SP33 |
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