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VSC7511 Datasheet(PDF) 135 Page - Microsemi Corporation

Part # VSC7511
Description  4-Port Layer-2 Gigabit Ethernet Switch
PDF  324 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC7511 Datasheet(HTML) 135 Page - Microsemi Corporation

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Functional Descriptions
VMDS-10488 VSC7511 Datasheet Revision 4.2
120
•
If ANA:PORT:POL_CFG.POL_CPU_REDIR_8021 is set, frames being redirected to the CPU due to
the classifier detecting the frames as being BPDU, ALLBRIDGE, GARP, or CCM/Link trace frames
are not policed.
•
If ANA:PORT:POL_CFG.POL_CPU_REDIR_IP is set, frames being redirected to the CPU due to the
classifier detecting the frames as being IGMP or MLD frames are not policed.
These frames are still considered part of the rates being measured so the frames add to the relevant
policer buckets but they are never discarded due to policing.
The VCAP IS2 has the option to disable the port policing and QoS class policing. This is done with the
action POLICE_VCAP_ONLY. If POLICE_VCAP_ONLY is set, only a VCAP assigned policer can police
the frame. The other policers are inactive meaning the frame does not add to the policers’ buckets and
the frame is never discarded due to policing by the policers.
The order in which the policers are executed is controlled through ANA:PORT:POL_CFG.POL_ORDER.
The order can take the following main modes:
•
Serial The policers are checked one after another. If a policer is closed, the frame is discarded and
the subsequent policer buckets are not updated with the frame. The serial order is programmable.
•
Parallel with independent bucket updates The three policers are working in parallel
independently of each other. Each frame is added to a policer bucket if the policer is open, otherwise
the frame is discarded. A frame may be added to one policer although another policer is closed.
•
Parallel with dependent bucket updates The three policers are working in parallel but dependent
on each other with respect to bucket updates. A frame is only added to the policer buckets if all three
policers are open.
3.10.2
Policer Burst and Rate Configuration
Each of the policers is MEF-compliant dual leaky bucket policers. This implies that each policer supports
the following configurations:
•
Committed Information Rate (CIR). Specified in POL_CIR_CFG.CIR_RATE in steps of 33.3 kbps.
Maximum rate is 1.09 Gbps. If higher bandwidths are required, the policer for 2.5G ports must be
disabled.
•
Committed Burst Size (CBS). Specified in POL_CIR_CFG.CIR_BURST in steps of 4 kilobytes.
Maximum is 252 kilobytes.
•
Excess Information Rate (EIR). Specified in POL_PIR_CFG.PIR_RATE in steps of 33.3 kbps.
Maximum rate is 1.09 Gbps. If higher bandwidths are required, the policer for 2.5G ports must be
disabled.
•
Excess Burst Size (EBS). Specified in POL_PIR_CFG.PIR_BURST in steps of 4 kilobytes. Maximum
is 252 kilobytes.
•
Coupling flag. If POL_MODE_CFG.DLB_COUPLED is set, frames classified as yellow (DP level = 1)
are allowed to use of the committed information rate when not fully used by frames classified as
green (DP level = 0). If cleared, the rate of frames classified as yellow are bounded by EIR.
•
Color mode. Color-blind or color-aware. A policer always obey the frame color assigned by the
classifier. To achieve color-blindness, the classifier must be set up to classify all incoming frames to
DP level = 0.
The following parameters can also be configured per policer:
•
The leaky bucket calculation can be configured to include or exclude preamble and inter-frame gap
through configuration of POL_MODE_CFG.IPG_SIZE.
•
Each policer can be configured to measure frame rates instead of bit rates
(POL_MODE_CFG.FRM_MODE). The rate unit can be configured to 100 frames per second or 1
frame per second.
•
Each policer can operate as a single leaky bucket by disabling POL_MODE_CFG.CIR_ENA. When
operating as a single leaky bucket, the POL_PIR_CFG register controls the rate and burst of the
policer.
By default, a policer discards frames while the policer is closed. A discarded frame is neither forwarded
to any ports (including the CPU) nor is it learned.
Each port policer, however, has the option to run in flow control where the policer instructs the MAC to
issue flow control pause frames instead of discarding frames. This is enabled in



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