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H5GQ2H24AFR-R0C Datasheet(PDF) 82 Page - Hynix Semiconductor |
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H5GQ2H24AFR-R0C Datasheet(HTML) 82 Page - Hynix Semiconductor |
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82 / 172 page ![]() This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsability for use of circuits described. No patent licenses are implied. Rev. 1.2 /Nov. 2011 82 H5GQ2H24AFR Figure 51. WRITE-With-Doublebyte-Mask Command CS# WE# CAS# RAS# CKE# A9 (A12) A1 A10,A11 A8 A7 LOW WDM CK CK# 0,1 BA0‐BA3 A2‐A5 A0,A6 DM DM DM DM DM DM DM DM EN AP DIS AP CA BA CA CA BA = Bank Address; CA = Column Address; DM = Data Mask EN AP = Enable Auto‐Precharge; DIS AP = Disable Auto‐Precharge Note: NOP shown as an example only |
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