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H5GQ2H24AFR-R0C Datasheet(PDF) 11 Page - Hynix Semiconductor

Part # H5GQ2H24AFR-R0C
Description  2Gb (64Mx32) GDDR5 SGRAM
PDF  172 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

H5GQ2H24AFR-R0C Datasheet(HTML) 11 Page - Hynix Semiconductor

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This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsability for use of circuits described. No patent licenses are implied.
Rev. 1.2 /Nov. 2011
11
H5GQ2H24AFR
Figure 3: GDDR5 SGRAM Power‐up Initialization
Table 1  Address and Command Termination
VALUE (OHMS)
CKE# at RESET# high transition
ZQ/2
Low
ZQ
High
TRAIN / MRS
TRAIN / MRS
ADR
CKE#
min. 200 μs
CMD
VDD
VDDQ
VREFD/C
RESET#
tATS tATH
Voltages and
CK stable
DQ<31:0>,
DBI#<3:0>
ADR
EDC<3,0>
All Banks
Precharge
WCK
NOP
NOP
CK#
CK
WCK#
PRE
NOP
tRP
Execution of steps
13‐21 in Power‐up
sequence
TRAIN / MRS
TRAIN / MRS
ADR
A.C.
ADR ADR
min. 200 μs
NOP
NOP
EDC<2,1>
x32
x16
TRAIN / MRS
A.C.
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Note:  A.C. = Any Command



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